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SLG47503 Datasheet(PDF) 91 Page - Dialog Semiconductor |
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SLG47503 Datasheet(HTML) 91 Page - Dialog Semiconductor |
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91 / 191 page  Datasheet 16-Jul-2021 CFR0011-120-00 Revision 2.0 91 of 191 © 2021 Dialog Semiconductor SLG47502/03 Low Voltage GreenPAK Programmable Mixed-Signal Matrix Preliminary 9.2 ACMP1H BLOCK DIAGRAM Figure 74: ACMP1H Block Diagram Selectable Gain GPIOx: ACMP1H+ GPIOx in analog IO mode; Registers [1526:1525] from Connection Matrix Output [94] Hysteresis Selection Registers [1511:1510] Pwr Up ACMP Ready LATCH 0 1 W/S Control Register [953:952] to Connection Matrix Input [61] Registers [1515:1514] High Speed ACMP From ACMP0H IN+ MUX Output 2 Temperature sensor out 111111 000000 100001 ... Internal Vref Registers [1509:1504] Low Pass Filter* 34 Note*: 2 nd order low pass filter typical bandwidth is 300 kHz Ext Vref1 input 1 0 Register [1517] Ext Vref0 input 00 01 10 11 |
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