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SLG47503 Datasheet(PDF) 27 Page - Dialog Semiconductor |
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SLG47503 Datasheet(HTML) 27 Page - Dialog Semiconductor |
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27 / 191 page ![]() Datasheet 16-Jul-2021 CFR0011-120-00 Revision 2.0 27 of 191 © 2021 Dialog Semiconductor SLG47502/03 Low Voltage GreenPAK Programmable Mixed-Signal Matrix Preliminary 5.6 GPIO WITH I2C MODE IO STRUCTURE 5.6.1 GPIO with I2C Mode Structure (for GPIO0 and GPIO1) Figure 4: GPIO with I2C Mode IO Structure Diagram 2 k Ω (Note 3) LV_EN WOSMT_EN Digital In Analog IO Non-Schmitt Trigger Input Low Voltage Input VDD GPIO0, GPIO1 Mode [2:0] 00: Digital Input without Schmitt Trigger 01: Reserved 10: Low Voltage Digital Input 11: Reserved Note 1: OE cannot be selected by user and is controlled by register. Digital In is Matrix input. Note 2: GPIO0 and GPIO1 do not support Push-Pull and PMOS Open-Drain modes. Note 3: Can be varied over PVT, for reference only. PAD OE OE Digital OUT I 2C_EN register [31] s0 s1 s2 s3 900 k Ω 90 k Ω 8 k Ω Floating s1 s0 Pull-up_EN Res_sel [1:0] 00: Floating 01: 10 k Ω 10: 100 k Ω 11: 1 M Ω Digital OUT I 2C_EN register [31] FAST_MODE_EN register [1312]/[1328] I 2C_EN register [31] GPIO0/1_OD_EN register [1313]/[1329] |
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