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SLG47503 Datasheet(PDF) 60 Page - Dialog Semiconductor

Part # SLG47503
Description  Low Voltage GreenPAK Programmable Mixed-Signal Matrix
PDF  191 Pages
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Manufacturer  DIALOG [Dialog Semiconductor]
Direct Link  http://www.dialog-semiconductor.com/
Logo DIALOG - Dialog Semiconductor

SLG47503 Datasheet(HTML) 60 Page - Dialog Semiconductor

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Datasheet
16-Jul-2021
CFR0011-120-00
Revision 2.0
60 of 191
© 2021 Dialog Semiconductor
SLG47502/03
Low Voltage GreenPAK Programmable
Mixed-Signal Matrix
Preliminary
7.4.1 4-Bit LUT Macrocell Used as 4-Bit LUT
This macrocell, when programmed for a LUT function, uses a 16-bit register to define their output function:
Figure 41: DFF13 and Shift Register 13 Operation, nReset, Initial Value: xA7B2
Q=ShReg_Out[0]
(see note 2)
Q=ShReg_Out[15]
(see note 3)
16 Clk pulses
VDD
Data
Clk
POR
Initial Value (xA7B2)
10100111/10110010
00000000
00000000
00000000
00000001
00000000
00000010
00000000
00000100
00000000
00001000
00000000
00010000
00000000
00100000
00000000
01000001
00000000
10000011
00000001
00000111
00000010
00001111
Inital Value is loaded from NVM to Shift Register
CLK_En
00000100
00011111
00001000
00111110
00010000
01111100
00100000
11111001
01000001
11110011
10000011
11100110
00000111
11001100
Note1
: DFF Setting “Initial Value: 0”
Note2
: Macrocell is configured as DFF
Note3
: Macrocell is configured as 16-bits ShReg
nReset
(see note 1)
ShReg_Out[15:0]
(Internal Signal)
Table 28: 4-bit LUT0 Truth Table
IN3
IN2
IN1
IN0
OUT
0
0
0
0
register [728]
LSB
0
0
0
1
register [729]
0
0
1
0
register [730]
0
0
1
1
register [731]
0
1
0
0
register [732]
0
1
0
1
register [733]
0
1
1
0
register [734]
0
1
1
1
register [735]
1
0
0
0
register [736]
1
0
0
1
register [737]
1
0
1
0
register [738]
1
0
1
1
register [739]
1
1
0
0
register [740]
1
1
0
1
register [741]
1
1
1
0
register [742]
1
1
1
1
register [743]
MSB



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