VIA Technologies, Inc.
Preliminary VT6508 Datasheet
-12-
See Fig. 2 GND
G
Ground supply to the core digital logic.
See Fig. 2 VSS
G
Ground supply to all I/O pads.
DEFINITION OF VT6508B STRAPPING PINS
SD[31:0]:
*Note that the default strapping bit value is “1”.
Pin
Description
SD[0]
Broadcast or Drop BPDU Packets:
BCAST_BPDU == 1’ b1 => broadcast BPDU packet if CPU_FWD_CFG[1] == 0
(default)
BCAST_BPDU == 1’ b0 => drop BPDU packet if CPU_FWD_CFG[1] == 0
Note that BPDU packets will be forwarded to CPU port if CPU_FWD_CFG[1] == 1
without regard to the value of BCAST_BPDU.
SD[1]
LED Display Combination of Link Activity Status with RX/TX Event:
LED_COMB [0] == 1’ b1 => combined (default)
LED_COMB [0] == 1’ b0 => not combined
Note that the LED bit sequence [10:1] is used originally to display link activity status. By
setting combination with RX/TX event, it will indicate both the link activity status and
RX/TX events so that required LED number can be reduced.
SD[2]
Enable Drop Control for Private Buffer Reservation:
DROP_CONTROL_EN [0] == 1’ b1 => enabled (default)
DROP_CONTROL_EN [1] == 1’ b0 => disabled
Note that drop control has a lower priority than flow control and backpressure.
If it is disabled, all TMACs will not make the drop window signals to Forwarding Control.
If it is enabled and the flow control/backpressure mechanism is not enabled, all TMACs
will make the drop window signals to Forwarding Control.
If it is enabled and the flow control mechanism is also enabled, but the full-duplex party
has no flow control capability, TMAC will make the drop window signal to Forwarding
Control.
SD[3]
SRAM TYPE:
SRAM_TYPE == 1’ b1 => 64Kx32 (default)
SRAM_TYPE == 1’ b0 => 32Kx32
size=128KB: FREEMCNT=64, XON_THRED=43, PRIVATE_BUF_SIZE=1
V_FREE=10, MIN_XOFF_CONST_THRED=15
size=256KB: FREEMCNT=149, XON_THRED=98, PRIVATE_BUF_SIZE=4
V_FREE=10, MIN_XOFF_CONST_THRED=28
SD[5:4]
CHIP INIT MODE [1:0]:
CHIP_INIT[1:0] == 2’ b11 => Chip Initialization via strapping only (default)
CHIP_INIT[1:0] == 2’ b10 => Chip Initialization via EEPROM
CHIP_INIT[1:0] == 2’ b01 => Chip Initialization via CPU
CHIP_INIT[1:0] == 2’ b00 => Chip Initialization via EEPROM in speedup mode
In none speedup mode, EEC = 78.125K Hz, LED period = 50ms.
In speedup mode for testing, EEC = 2.778MHz, LED period = 1ms without one-second
flash.
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