VIA Technologies, Inc.
Preliminary VT6508 Datasheet
-33-
06-07H aging index
06H: AGING_INDEX[7:0]
07H: AGING_INDEX[10:8]
for CPU to trigger aging on specific entry
AGING_INDEX
[10:0]
0
R/W
08H
aging status
0: idle or complete
1: in progress (no matter how the process is
triggered by auto-init or by CPU)
for CPU to detect status of aging process
AGING_STATUS
[0]
0
R/W
09H
hash algorithm
HASH_ALG[0] : 0, crc11, 1, direct map
HASH_ALG[1] : 0, scramble, 1, no scramble
The default setting 2b’ 00 is optimized specially
for Smartbit test, each combination may just be
as good as others.
HASH_ALG[1:0]=2b’ 11: direct map without
scramble, hash key = MAC[10:0]
HASH_ALG[1:0]=2b’ 01: direct map with
scramble,
hash key = MAC[7:0, 16:18]
HASH_ALG[1:0]=2b’ 10: CRC map & no
scramble, hash key = CRC11{MAC[47:0]}
HASH_ALG[1:0]=2b’ 00: CRC map with
scramble, hash key =
CRC11{MAC[47:24,15:0,16:23]}
The forwarding table entry format is as follows.
[58]
static
[57:56] age count
[49:40] forwarding portmask
[39:0]
tag
Regardless of the hash algorithm, the tag will
always use MAC[47:8]. The mapping is as
follows.
Tag[39:32]
ßà MAC[15:8]
Tag[31:24]
ßà MAC[23:16]
Tag[23:16]
ßà MAC[31:24]
Tag[15:8]
ßà MAC[39:32]
Tag[7:0]
ßà MAC[47:40]
HASH_ALG
[1:0]
0 if
strapping
SD[24]=1
,
3 if
strapping
SD[24]=0
R/W
0A-
0FH
destination MAC object
0AH: DMAC[47:40],
0BH: DMAC[39:32],
…
,
0FH: DMAC[7:0].
A write to this register will make the
corresponding CRC-map lower 11-bit hash key
and upper 37-bit tag shown in HASH_CONTENT.
DMAC_OBJ
[47:0]
0
R/W
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