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VIA Technologies, Inc.
Preliminary VT6508 Datasheet
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3 THE VT6508 SRAM ADDRESS MAPPING TABLE
128-pin 32bit mode ( 1 Bank of 32Kx32, 64Kx32):
Internal
64bit
linear
Address
6508 Pad(64bit mode)
6508 Package
Address Pin
SRAM Address Pin
SRAM chip
select
IA15
SA15 = IA14
SA15 =
IA14
A15 = IA14
N/A for 32kx32
IA14
SA14 = IA13
SA14 =
IA13
A14 = IA13
IA13
SA13 = IA12
SA13 =
IA12
A13 = IA12
IA12
SA12 = IA11
SA12 =
IA11
A12 = IA11
IA11
SA11 = IA10
SA11 =
IA10
A11 = IA10
IA10
SA10 = IA9
SA10 = IA9
A10 = IA9
IA9
SA9 = IA8
SA9 = IA8
A9 = IA8
IA8
SA8 = IA7
SA8 = IA7
A8 = IA7
IA7
SA7 = IA6
SA7 = IA6
A7 = IA6
IA6
SA6 = IA5
SA6 = IA5
A6 = IA5
IA5
SA5 = IA4
SA5 = IA4
A5 = IA4
IA4
SA4 = IA3
SA4 = IA3
A4 = IA3
IA3
SA3 = IA2
SA3 = IA2
A3 = IA2
IA2
SA2 = IA1
SA2 = IA1
A2 = IA1
IA1
SA1 = IA0
SA1 = IA0
A1 = IA0
IA0
SA0 = 0
(internally)
N/A
A0 = 0(directly tie
to ground)