
VIA Technologies, Inc.
Preliminary VT6508 Datasheet
6
FEATURES
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Single chip 8 ports 10/100Mbps Ethernet switch controller
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Highly integrated single chip shared memory switch engine
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Supports 8 RMII (Reduced Media Independent Interface) ports
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Non-blocking layer 2 switch, 148,810 packets/sec on each 100Mbps Ethernet port
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Media Access Control (MAC)
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Dual 64-byte FIFO’s per port for receiving and transmitting
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Auto-sensing 10/100Mbps media speed, full/half -duplex mode, and flow-control
capability
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Two switching mechanisms
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Supports ‘store and forward’ switching with filtering CRC-bad packets
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Supports ‘cut through’ switching subject to long packets of length over 64 bytes
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Packet buffering
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Glueless 32-bit interface to SSRAM as a packet buffer pool
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64 packet buffers for 32Kx32 SSRAM, 149 packet buffers for 64Kx32 SSRAM
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1536 bytes for each packet buffer
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Storing control data (forwarding table and packet link entries) in external SSRAM
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Buffer status is stored in the internal free-buffer bit map registers
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Shared forwarding table of 2K entries (or 4K slots) to support multiple (up to 4K)
Mac addresses per port
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Efficient address recognition, self learning, and auto-aging mechanism
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Two-slot hashing algorithm to prevent hash collision
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Two optional hashing algorithms, CRC-map and direct-map
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Advanced congestion control mechanism
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IEEE 802.3X compliant flow control for full duplex ports
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Backpressure for half duplex ports
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Drop control for full duplex ports without flow control capability
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Incorporating with the output private buffering scheme to prevent HOL (head of line)
blocking
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Supports port mirroring (Sniffer feature)
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By-pass VLAN packets
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Support port-based trunking
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Support two individual trunk groups, each of 2 member ports
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Load balance according to DMAC address and source port number
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Support chip initialization through EEPROM or by strapping only
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Supports I
2C EEPROM interface for customized configuration
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Supports LED serial-out in the strapping-only initialization mode
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50MHz internal reference clock rate
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83~100MHz SSRAM clock rate, typically 83MHz
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Single +3.3V supply, 0.3
µm TSMC CMOS technology
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128-pin PQFP package