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CS43198 Datasheet(PDF) 30 Page - Cirrus Logic |
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CS43198 Datasheet(HTML) 30 Page - Cirrus Logic |
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30 / 137 page  30 DS1156F1 CS43198 4.3 Class H Output 4.3.2 Power-Supply Transitions Charge-pump transitions from the lower to the higher set of rail voltages occur on the next FLYN/FLYP clock cycle. Despite the system’s fast response time, the VCP_FILT pin’s capacitive elements prevent rail voltages from changing instantly. Instead, the rail voltages ramp up from the lower to the higher supply, based on the time constant created by the output impedance of the charge pump and the capacitor on the VCP_FILT pin (the transition time is approximately 20 µs). Fig. 4-4 shows Class H supply switching. During this charging transition, a high dv/dt transient on the inputs may briefly clip the outputs before the rail voltages charge to the full higher supply level. This transitory clipping has been found to be inaudible in listening tests. Figure 4-4. VCP_FILT Transitions When the charge pump transitions from the lower to higher set or rail voltage, there is no delay associated with the transition. +VCP Ideal Transition Actual Transition caused by VCP_FILT+ Capacitor Time +VP_LDO -VCP -VP_LDO |
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