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MEC1632 Datasheet(PDF) 181 Page - Microchip Technology

Part # MEC1632
Description  Low Power 32-Bit Mobile Embedded Controller
PDF  636 Pages
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Manufacturer  MICROCHIP [Microchip Technology]
Direct Link  http://www.microchip.com
Logo MICROCHIP - Microchip Technology

MEC1632 Datasheet(HTML) 181 Page - Microchip Technology

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 2012-2018 Microchip Technology Inc.
DS00001592B-page 181
MEC1632
1
IBF
(IBF_OS; ALIASED)
The Input Buffer Full bit is set to indicate that a the ACPI_OS has
written a command or data to the ACPI_EC and that data is ready.
This bit is automatically cleared when data has been read by the
ACPI_EC.
Note:
The setting and clearing of this IBF varies depending on
the setting of the following bits: CMD bit in this register
and Four Byte Access bit in the Byte Control OS-Regis-
ter. Three scenarios follow:
1.
The IBF is set when the ACPI_OS writes to the ACPI OS
COMMAND Register. This same write autonomously sets the
CMD bit in this register.
The IBF is cleared if the CMD bit in this register is set and the
ACPI_EC reads from OS2EC Data EC-Register Byte 0.
Note:
When the CMD bit in this register is set the Four Byte
Access bit in the Byte Control OS-Register has no impact
on the IBF bit behavior.
2.
A write by the ACPI_OS to the ACPI OS Data Register Byte 0
sets the IBF bit if the Four Byte Access bit in the Byte Control
OS-Register is in the cleared to ‘0’ state prior to this write. This
same write autonomously clears the CMD bit in this register.
A read of the OS2EC Data EC-Register Byte 0 clears the IBF bit if
the Four Byte Access bit in the Byte Control OS-Register is in the
cleared to ‘0’ state prior to this read.
3.
A write by the ACPI_OS to the ACPI OS Data Register Byte 3
sets the IBF bit if the Four Byte Access bit in the Byte Control
OS-Register is in the set to ‘1’ state prior to this write. This
same write autonomously clears the CMD bit in this register.
A read of the OS2EC Data EC-Register Byte 3 clears the IBF bit if
the Four Byte Access bit in the Byte Control OS-Register is in the
set to ‘1’ state prior to this read.
An EC_IBF interrupt signals the ACPI_EC that there is data
available. The ACPI Specification usage model is as follows:
1.
The ACPI_EC reads the STATUS EC-Register and sees the
IBF flag set,
2.
The ACPI_EC reads all the data available in the OS2EC DATA
BYTES[3:0]. This causes the IBF bit to be automatically
cleared by hardware.
3.
The ACPI_EC must then generate a software interrupt (See
Note: on page 171) to alert the ACPI_OS that the data has
been read and that the host is free to write more data to the
ACPI_EC as needed.
R0h
nSYS_R
ST
Offset
04h
Bits
Description
Type
Default
Reset
Event



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