| Electronic Components Datasheet Search |
|
MEC1632 Datasheet(PDF) 191 Page - Microchip Technology |
|
|
|||||||||||||||||||||||||||||
MEC1632 Datasheet(HTML) 191 Page - Microchip Technology |
|
191 / 636 page ![]() 2012-2018 Microchip Technology Inc. DS00001592B-page 191 MEC1632 10.1.3 BLOCK DIAGRAM SIGNAL LIST 10.2 Power, Clocks and Reset 10.2.1 POWER DOMAIN This block is powered by VTR. See Section 7.1.1, "Power Configuration," on page 95 for details on power domains. 10.2.2 CLOCKS This block has four clock inputs: LPC Bus Clock, 1MHZ (MCLK_DIV20_EN_HST) clock source. LPC Bus Clock is used to the accessible and clock the registers in this block. The 1MHz Host Clock Domain is used to clock the counter in the CPU_RESET circuitry. See Section 7.4, "Clock Generator," on page 98 for details on clocks. 10.3 Power On Reset This block is reset on a nSYS_RST and nSIO_RESET. On a reset, all Register are reset to 00h and the state machines are set to idle. See Section 7.6, "Reset Interface," on page 124 for details on reset. 10.4 Interrupts The 8042 Emulated Keyboard Controller can generate a KBD_OBF interrupt when the OBF bit in the Keyboard Status Read Register is cleared (falling edge sensitive) and a KBD_IBF interrupt when the IBF bit in the Keyboard Status Read Register is set (active high, level sensitive). These interrupt sources are routed to the GIRQ19 Source Register. 10.4.1 8042 EMULATED KEYBOARD CONTROLLER (LDN 1H) SIRQ ROUTING The 8042 Emulated Keyboard Controller can generate two SIRQ events for the EC-to-HOST EC events:KIRQ & MIRQ. For the KIRQ interrupt the Interrupt Configuration Register, SELECT on page 72 is cleared to ‘0’ and for MIRQ the Inter- rupt Configuration Register, SELECT is set to’1’. See Logical Device Configuration, Section 5.7, "SERIRQ Interrupts," on page 71. 10.5 Instance Description There are two blocks defined in this chapter: 8042 MSG Interface and the Port92-Legacy. The MEC1632 has one instance of each block. TABLE 10-1: 8042 Emulated Keyboard Controller SIGNAL LIST Signal Name Direction Description EC_IBF Output Interrupt generated by the host writing either data or command to the data register EC_OBF Output Interrupt generated by the host reading either data or aux data from the data register KIRQ Output Routed to the Host SIRQ MIRQ Output Routed to the Host SIRQ KBRST Output Routed to Pin Function |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |