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MEC1632 Datasheet(PDF) 194 Page - Microchip Technology |
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MEC1632 Datasheet(HTML) 194 Page - Microchip Technology |
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194 / 636 page  MEC1632 DS00001592B-page 194 2012-2018 Microchip Technology Inc. 10.8.2 EC_HOST DATA / AUX DATA REGISTER This is an 8-bit read-only register. When read, by the HOST, the PCOBF and/or AUXOBF interrupts are cleared and the OBF flag in the status register is cleared. 10.8.3 KEYBOARD STATUS READ This is an 8 bit read only register. Refer to the description of the Status Register (EC OFFSET 104h) for more informa- tion. This register is read-only for the Host and read/write by the EC. The EC cannot write to bits 0, 1, or 3 of the Status reg- ister. APPLICATION NOTE: The IBF and OBFbits are not cleared (‘0’) by hardware when VCC_PWRGD is asserted or when the LPC interface powers down; for example, following system changes state S3->S0, S5->S0, G3-> S0. To clear the IBF bit in firmware, read offset 100h; to clear the OBF bit in firmware, read offset 000h. UD1 Read/Write by EC. These bits are user-definable. This bit is reset to ‘0’ when LRESET# pin signal function is asserted. UD Read/Write by EC. These bits are user-definable. C/D Command Data - This bit specifies whether the input data register contains data or a command (“0” = data, “1” = com- mand). During a host command write operation, this bit is set to “1”, during a host data write operation, this bit is set to “0”. TABLE 10-6: EC_HOST DATA/AUX DATA REGISTER HOST I/O INDEX 00h 8-bit HOST SIZE EC OFFSET 100h Data or 10Ch Aux Data 8-bit EC SIZE POWER VTR 00h nSYS_RST DEFAULT BUS LPC SPB BYTE3 BIT D7D6D5 D4D3 D2 D1 D0 HOST TYPE R R R RRR RR EC TYPE WW WW WWW W BIT NAME Data TABLE 10-7: KEYBOARD STATUS READ REGISTER HOST I/O INDEX 4h 8-bit HOST SIZE EC OFFSET 104h 8-bit EC SIZE POWER VTR 00h nSYS_RST DEFAULT BUS LPC SPB BYTE3 BIT D7D6D5 D4D3 D2 D1 D0 HOST TYPE R R R RRR RR EC TYPE R/W R/W R/W R/W R R/W R R BIT NAME UD UD AUXOBF UD C/D UD1 IBF OBF |
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