MEC1632 datasheet(192/636 Pages) MICROCHIP

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MEC1632

DS00001592B-page 192

 2012-2018 Microchip Technology Inc.

10.6

Registers

The 8042 Emulated Keyboard Controller has a 8042 MSG Interface block which has its own Logical Device Number,

and Base Address as indicated in Table 10-2. The Host LPC I/O addresses for the 8042 MSG Interface is selected via

Base Address Register (see Section 5.6.2, "Base Address Registers," on page 66). LPC access to configuration regis-

ters is through Host Access Configuration Port (see Section 5.5.1, "Host Access Port," on page 65).

The 8042 Emulated Keyboard Controller also has a Port92-Legacy block which has a separate Logical Device Number

and Base Address Register as indicated in Table 10-2. The Base Address Register for the Port92-Legacy has only one

writable bit, the Valid Bit, since the only I/O accessible Register has a fixed address.

Table 10-3 is a register summary for the 8042 MSG Interface block and Table 10-14 on page 198 is a register summary

for the Port92-Legacy block.

Note 10-1

The Host LPC I/O addresses for this instance is selected via a Base Address Register (see Section

5.6.2, "Base Address Registers," on page 66). LPC access to configuration registers is through the

Host Access Configuration Port (see Section 5.5.1, "Host Access Port," on page 65).

Table 10-3 is a register summary for the 8042 MSG Interface block. The LPC I/O address for each Run-Time Register

is described below as an offset from its Base Address Register. Each EC address is indicated as an SPB Offset from

its AHB base address. Each Configuration register access through the Host Access Port is via its LDN indicated in

Table 10-2 on page 192 and its Host Access Port index which is described as “Host Config Index” in the tables below.

Note 10-2

CMD is bit D3 in the Keyboard Status Read Register.

Note 10-3

All Registers listed in Table 10-3 are powered by VTR and reset by nSYS_RST.

TABLE 10-2:

8042 Emulated Keyboard Controller BASE ADDRESS TABLE

8042 Emulated Keyboard

Controller

Blocks

LDN from

(

Table 4-2 on

page 59)

AHB Base Address

8042 MSG Interface

FF_0400h

Port92-Legacy

FF_2000h

TABLE 10-3:

8042 MSG Interface REGISTER SUMMARY

Host I/O Access

CMD

Note 10

-2

EC Interface

Host I/O

Index

SPB

Offset

Host

Type

SPB

Offset

Byte

Lane

Type

Notes

HOST_EC Data/CMD

00h

100h

04h

EC_HOST Data/AUX

Data Register

00h

100h

010Ch

Keyboard Status Read

04h

104h

R/W

PCOBF Register

114h

R/W

Keyboard Control

108h

R/W

Host Access

EC Interface

Host Config.

Index

SPB

Offset

Host

Type

N/A

Offset

Byte

Lane

Type

Activate Register

30h

330h

R/W

330h

R/W

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