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AT25SL321 Datasheet(PDF) 1 Page - Renesas Technology Corp |
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AT25SL321 Datasheet(HTML) 1 Page - Renesas Technology Corp |
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1 / 82 page ![]() Datasheet DS-AT25SL321-112 Rev. J Page 1 Nov 1, 2022 © 2022 Renesas Electronics Features ▪ Single 1.7 V - 2.0 V Supply ▪ 32-Mbit Flash Memory ▪ Serial Peripheral Interface (SPI) and Quad Peripheral Interface (QPI) Compatible • Supports SPI Modes 0 and 3 • Supports Dual Output Read and Quad I/O Program and Read • Supports QPI Program and Read • 104 MHz Maximum Operating Frequency • Clock-to-Output (tV1) of 6 ns • Up tp 65 Mbytes/s continuous data transfer rate ▪ Full Chip Erase ▪ Flexible, Optimized Erase Architecture for Code and Data Storage Applications • 0.6 ms Typical Page Program (256 bytes) Time • 60 ms Typical 4 kbyte Block Erase Time • 200 ms Typical 32 kbyte Block Erase Time • 350 ms Typical 64 kbyte Block Erase Time ▪ Hardware Controlled Locking of Protected Blocks via WP Pin ▪ 4 kbit secured One-Time Programmable Security Register ▪ Hardware Write Protection ▪ Serial Flash Discoverable Parameters (SFDP) Register ▪ Flexible Programming • Byte/Page Program (1 to 256 bytes) • Dual or Quad Input Byte/Page Program (1 to 256 bytes) • Accelerated programming mode through 9 V ACC pin ▪ Erase/Program Suspend and Resume ▪ JEDEC Standard Manufacturer and Device ID Read Methodology ▪ Low Power Dissipation • 2 µA Deep Power-Down Current (Typical) • 10 µA Standby current (Typical) • 7 mA Active Read Current (Typical) ▪ Endurance: 100,000 program/erase cycles (4, 32, or 64 kbyte blocks) ▪ Data Retention: 20 Years ▪ Industrial Temperature Range: -40 °C to +85 °C ▪ Industry Standard Green (Pb/Halide-free/RoHS Compliant) Package Options • 8MA1, 8-pad UDFN (6 x 5 x 0.6 mm) • 8MA2, 8-pad USON(3 x 4 x 0.55 mm) • 8S1, 8-lead SOIC (150 mil) • 8-ball WLCSP, die Ball Grid Array (dBGA) AT25SL321 32-Mbit, 1.7 V Minimum SPI Serial Flash Memory with Dual I/O, Quad I/O, and QPI Support |
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