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AT25SL321 Datasheet(PDF) 14 Page - Renesas Technology Corp |
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AT25SL321 Datasheet(HTML) 14 Page - Renesas Technology Corp |
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14 / 82 page ![]() DS-AT25SL321-112 Rev. J Page 14 Nov 1, 2022 © 2022 Renesas Electronics AT25SL321 Datasheet 6. Write Protection To protect inadvertent writes by the possible noise, several means of protection are applied to the Flash memory. 6.1 Write Protect Features ▪ While Power-on reset, all operations are disabled and no command is recognized. ▪ An internal time delay of tPUW can protect the data against inadvertent changes while the power supply is outside the operating specification. This includes the Write Enable, Page program, Block Erase, Chip Erase, Write Security Register and the Write Status Register commands. ▪ For data changes, Write Enable command must be issued to set the Write Enable Latch (WEL) bit to 0. Power-up, Completion of Write Disable, Write Status Register, Page program, Block Erase and Chip Erase are subjected to this condition. ▪ Write Protect (WP) pin can control to change the Status Register under hardware control. ▪ The Deep Power Down mode provides extra protection from unexpected data changes as all commands are ignored under this status except for Release Deep Power Down command. |
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