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AT25SL321 Datasheet(PDF) 23 Page - Renesas Technology Corp |
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AT25SL321 Datasheet(HTML) 23 Page - Renesas Technology Corp |
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23 / 82 page ![]() DS-AT25SL321-112 Rev. J Page 23 Nov 1, 2022 © 2022 Renesas Electronics AT25SL321 Datasheet 8.4 Write Disable (04h) The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Register. To enter the Write Disable command, assert CS low prior to driving the command 04h onto the SI on the rising edge of SCK, and then driving CS high to terminate the operation. The WEL bit is automatically reset write- disable status of 0 after Power-up and upon completion of the every Program, Erase and Write Status Register commands. Figure 6. Write Disable Command for SPI Mode (left) and QPI Mode (right) 03 5 246 7 1 Mode 3 Mode 0 Mode 3 Mode 0 High-Impedance SCK SCK CS Command (04h) Command (04h) 01 Mode 3 Mode 0 Mode 3 Mode 0 CS SI SO IO 0 IO 1 WP IO 2 HOLD IO 3 |
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