Introduction
ARM DDI 0192A
Copyright © ARM Limited 1997, 1998, 2000. All rights reserved.
1-19
Load
With immediate offset
word
LDR Rd, [Rb, #7bit_offset]
halfword
LDRH Rd, [Rb, #6bit_offset]
byte
LDRB Rd, [Rb, #5bit_offset]
With register offset
word
LDR Rd, [Rb, Ro]
halfword
LDRH Rd, [Rb, Ro]
signed halfword
LDRSH Rd, [Rb, Ro]
byte
LDRB Rd, [Rb, Ro]
signed byte
LDRSB Rd, [Rb, Ro]
PC-relative
LDR Rd, [PC, #10bit_Offset]
SP-relative
LDR Rd, [SP, #10bit_Offset]
Address
using PC
ADD Rd, PC, #10bit_Offset
using SP
ADD Rd, SP, #10bit_Offset
Multiple
LDMIA Rb!, <reglist>
Store
With immediate offset
word
STR Rd, [Rb, #7bit_offset]
halfword
STRH Rd, [Rb, #6bit_offset]
byte
STRB Rd, [Rb, #5bit_offset]
With register offset
word
STR Rd, [Rb, Ro]
halfword
STRH Rd, [Rb, Ro]
byte
STRB Rd, [Rb, Ro]
SP-relative
STR Rd, [SP, #10bit_offset]
Multiple
STMIA Rb!, <reglist>
Push/Pop
Push registers onto stack
PUSH <reglist>
Push LR, and registers onto
stack
PUSH <reglist, LR>
Table 1-12 Thumb instruction summary (continued)
Operation
Assembler
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