85 / 242 page
Memory Management Unit
ARM DDI 0192A
Copyright © ARM Limited 1997, 1998, 2000. All rights reserved.
6-3
•
If the TLB contains a translated entry for the virtual address, the access control
logic determines if access is permitted.
•
If access is permitted, the MMU outputs the appropriate physical address
corresponding to the virtual address.
•
If access is not permitted, the MMU signals the CPU to abort.
If the TLB misses (it does not contain a translated entry for the virtual address), the
translation table walking hardware is invoked to retrieve the translation information
from a translation table in physical memory. Once retrieved, the translation information
is placed into the TLB, possibly overwriting an existing value. The entry to be
overwritten is chosen by cycling sequentially through the TLB locations.
Note
The TLB must be flushed whenever the virtual to physical address mappings are
changed.
6.1.4
Effect of reset
For information on the effect of reset, see Reset on page 2-23.
English ▼
English
Chinese
German
Japanese
Russian
Korean
Spanish
French
Italian
Portuguese
Polish
Vietnamese
Indian
Mexican
British
New Zealand
