SC28L202 datasheet(70/77 Pages) PHILIPS

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Philips Semiconductors

Objective specification

SC28L202

Dual UART

2000 Feb 10

NOTES:

INTRN or OP3-OP7 when used as interrupt outputs.

The test for open-drain outputs is intended to guarantee switching of the output transistor. Measurement of this response is referenced from the midpoint of the switching

signal, VM, to a point 0.5V above VOL. This point represents noise margin that assures true switching has occurred. Beyond this level, the effects of external circuitry and

test environment are pronounced and can greatly affect the resultant measurement.

VOL +0.5V

VOL

WRN

INTERRUPT1

OUTPUT

tIR

VOL +0.5V

VOL

RDN

INTERRUPT1

OUTPUT

tIR

SD00136

Figure 8. Interrupt Timing (80xxx mode)

C1 = C2

∼ 24pF FOR CL = 20pF

tCLK

tCTC

tRx

tTx

X1/CLK

CTCLK

RxC

TxC

tCLK

tCTC

tRx

tTx

VCC

470

Ω

X2*

CLK

*NOTE: X2 MUST BE LEFT OPEN.

14.7456MHz

SC28L92

NOTE:

RESISTOR REQUIRED

FOR TTL INPUT.

TO UART

CIRCUIT

50k

Ω

100k

Ω

3pF

C1 and C2 should be chosen according to the crystal manufacturer’s specification.

C1 and C2 values will include any parasitic capacitance of the wiring and X1 X2 pins.

2pF

4pF

Package capacitance approximately 4pF.

SD00689

PARASITIC CAPACITANCE

Figure 9. Clock Timing

SC28L202 Datasheet(PDF) 70 Page - NXP Semiconductors

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