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PM3350-SW Datasheet(PDF) 38 Page - PMC-Sierra, Inc |
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PM3350-SW Datasheet(HTML) 38 Page - PMC-Sierra, Inc |
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38 / 224 page ![]() ELAN 8X10 PM3350 ELAN 8 X10 DATA SHEET PMC-970109 ISSUE 3 8 PORT ETHERNET SWITCH PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY 36 MADDR[19:0] MRAS* MCS[n]* MRD* MDATA[31:0] ROW COL1 COL2 COL3 COL4 D1 D2 D3 D4 tARD tACD tCP tRAW tCAW DON'T CARE UNDEFINED tRDS DRP / 12-96 MADDR[19:0] MRAS* MCS[n]* MWR[3:0]* MDATA[31:0] ROW COL1 COL2 COL3 D1 D2 D3 D4 MADDR[19:0] MRAS* MCS[n]* MWR[3:0]* MDATA[31:0] ROW COL1 COL2 D2 Notes: (1) Pin definitions shown above are for single CAS DRAM. Dual CAS DRAM is supported by selecting the MDCAS bit in the memory configuration register. In this mode, the CAS signals are driven by MWE*[3:0] and the RAS signals are driven by MCS*[3:0]. (2) Asserting the MSLO bit in the memory configuration register extends the CAS low time to support 80 nS DRAM MRD* D1 COL4 4-Word Burst Read 4-Word Burst Write 1-Word Read Followed by Write tREC tCPL MCLK MCLK tCKP tARD tACD tCP tRAW tCAW tCPL tCKP tWDS tWDH MCLK tCKP tARD tACD tCP tRAW tCAW tCPL tRDH tWDS tWDH 60 ns Single CAS EDO DRAM |
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