PM3350-SW datasheet(69/224 Pages) PMC

69 / 224 page

ELAN 8X10

PM3350 ELAN 8 X10

DATA SHEET

PMC-970109

ISSUE 3

8 PORT ETHERNET SWITCH

PROPRIETARY AND CONFIDENTIAL TO PMC-SIERRA, INC., AND PMC-SIERRA, INC. CUSTOMERS ONLY

the initialization process. The Hash Pointer Array contains a total of 8192

pointers.

The first 1024 bytes of the operating environment are normally cached by the Switch

Processor in the data cache. As the data cache uses a write-back policy, the actual

memory locations corresponding to the cached structures may be out-of-date (i.e., not

reflect the most recent information written to the locations by the firmware). For

instance, the per-port SNMP counters contained within the Local Port Descriptors are

cached, and hence the memory images of the per-port counters may not be up-to-date.

Thus the Switch Processor must be forced to flush the data cache to update the

external memory locations prior to reading them from an external CPU via the PCI bus.

This can be accomplished via the messaging interface described further within this

section.

It is the responsibility of the bootstrap and initialization firmware contained within the

boot image to set up and initialize the entire operating environment described above.

Variables and Tables in Operating Environment

In addition to the major data structures (i.e., the register save space, the local and

expansion port descriptors, the port descriptor error counters, and the hash pointer

array), the Switch Processor operating environment contains a number of variables and

tables used during normal operation. Some of these memory locations (those located

between addresses 0x002000 and 0x0023ff in the memory map above) are normally

expected to be cached in the Switch Processor data cache, while the remainder are

never loaded into the data cache by the operating firmware. This section describes

these variables and their expected values.

The remainder of This section is TBD.

Packet Buffers

Ethernet packets are stored in the external RAM by the ELAN 8x10 chip in small, fixed

length

packet buffers; multiple packet buffers are chained in a linked list to hold a

complete Ethernet packet. The size of the packet buffers is determined at configuration

time, and may range from 64 to 240 bytes; the default is 80 bytes.

Each packet buffer contains an 8-byte header holding various control information, and

from 0 to at most (N - 8) bytes of payload, comprising Ethernet frame data. (In this

context 'N' denotes the total size of each packet buffer: the default 80-byte packet

buffers will contain at most 72 bytes of payload.) The Ethernet data stored in the packet

buffers includes the Ethernet header and CRC fields.

A MAC channel byte-swap control bit is implemented on a channel-by-channel basis in

the LWCTRL device control register (see register descriptions below). If the byte swap

PM3350-SW Datasheet(PDF) 69 Page - PMC-Sierra, Inc

PM3350-SW Datasheet(HTML) 69 Page - PMC-Sierra, Inc

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL