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PM7347 Datasheet(PDF) 201 Page - PMC-Sierra, Inc

Part # PM7347
Description  SATURN USER NETWORK INTERFACE for J2/E3/T3
PDF  341 Pages
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Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7347 Datasheet(HTML) 201 Page - PMC-Sierra, Inc

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S/UNI®-JET Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
201
Document ID: PMC-1990267, Issue 3
Register 365H: RXCP-50 LCD Count Threshold (MSB)
Bit
Type
Function
Default
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
Unused
X
Bit 4
Unused
X
Bit 3
Unused
X
Bit 2
R/W
LCDC[10]
0
Bit 1
R/W
LCDC[9]
0
Bit 0
R/W
LCDC[8]
1
Register 366H: RXCP-50 LCD Count Threshold (LSB)
Bit
Type
Function
Default
Bit 7
R/W
LCDC[7]
0
Bit 6
R/W
LCDC[6]
1
Bit 5
R/W
LCDC[5]
1
Bit 4
R/W
LCDC[4]
0
Bit 3
R/W
LCDC[3]
1
Bit 2
R/W
LCDC[2]
0
Bit 1
R/W
LCDC[1]
0
Bit 0
R/W
LCDC[0]
0
LCDC[10:0]
The LCDC[10:0] bits represent the number of consecutive cell periods the receive cell
processor must be out of cell delineation before loss of cell delineation (LCD) is declared.
Likewise, LCD is not de-asserted until receive cell processor is in cell delineation for the
number of cell periods specified by LCDC[10:0].
The default value of LCD[10:0] is 360, which translates to the integration periods shown in
Table 22.
Table 22 RXCP-50 LCD Integration Periods
Format
Average cell period
Default LCD integration
period
DS3 Direct Mapping
9.59 µs
3.45 ms
DS3 PLCP
10.42 µs
3.75 ms
E3 G.751 Direct Mapping
12.46 µs
4.49 ms
E3 G.751 PLCP
13.89 µs
5.00 ms
E3 G.832
12.50 µs
4.50 ms
J2 Direct Mapping
69.01 µs
24.84 ms
DS1 Direct Mapping
276.00 µs
99.40 ms



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