Electronic Components Datasheet Search
  English  ▼

X  

Preview PDF HTML

PM7347 Datasheet(PDF) 120 Page - PMC-Sierra, Inc

Part # PM7347
Description  SATURN USER NETWORK INTERFACE for J2/E3/T3
PDF  341 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  PMC [PMC-Sierra, Inc]
Direct Link  http://www.pmc-sierra.com
Logo PMC - PMC-Sierra, Inc

PM7347 Datasheet(HTML) 120 Page - PMC-Sierra, Inc

Back Button PM7347 Datasheet HTML 116Page - PMC-Sierra, Inc PM7347 Datasheet HTML 117Page - PMC-Sierra, Inc PM7347 Datasheet HTML 118Page - PMC-Sierra, Inc PM7347 Datasheet HTML 119Page - PMC-Sierra, Inc PM7347 Datasheet HTML 120Page - PMC-Sierra, Inc PM7347 Datasheet HTML 121Page - PMC-Sierra, Inc PM7347 Datasheet HTML 122Page - PMC-Sierra, Inc PM7347 Datasheet HTML 123Page - PMC-Sierra, Inc PM7347 Datasheet HTML 124Page - PMC-Sierra, Inc Next Button
Zoom Inzoom in Zoom Outzoom out
 120 / 341 page
background image
S/UNI®-JET Data Sheet
Released
Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use
120
Document ID: PMC-1990267, Issue 3
Register 31CH: PMON Path Parity Error Event Count LSB
Bit
Type
Function
Default
Bit 7
R
CPERR[7]
X
Bit 6
R
CPERR[6]
X
Bit 5
R
CPERR[5]
X
Bit 4
R
CPERR[4]
X
Bit 3
R
CPERR[3]
X
Bit 2
R
CPERR[2]
X
Bit 1
R
CPERR[1]
X
Bit 0
R
CPERR[0]
X
Register 31DH: PMON Path Parity Error Event Count MSB
Bit
Type
Function
Default
Bit 7
Unused
X
Bit 6
Unused
X
Bit 5
R
CPERR[13]
X
Bit 4
R
CPERR[12]
X
Bit 3
R
CPERR[11]
X
Bit 2
R
CPERR[10]
X
Bit 1
R
CPERR[9]
X
Bit 0
R
CPERR[8]
X
CPERR[13:0]
When configured for DS3 applications, CPERR[13:0] represents the number of DS3 path
parity errors that have been detected since the last time the DS3 path parity error counter was
polled.
This counter is forced to zero when the S/UNI-JET is configured for either J2 and E3
applications.
The counter (and all other counters in the PMON) is polled by writing to any of the PMON
register addresses (314H to 31FH) or to the S/UNI-JET Identification, Master Reset, and
Global Monitor Update Register (006H). Such a write transfers the internally accumulated
count to the CPERR Error Count Registers and simultaneously resets the internal counter to
begin a new cycle of error accumulation. This transfer and reset is carried out in a manner
that coincident events are not lost. The transfer takes 255 RCLK cycles to complete.
This counter is paused when the corresponding framer has lost frame alignment.



Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100  ...More


Datasheet Download

Go To PDF Page


Link URL



Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Contact us   |   Privacy Policy   |   Link to Datasheet    |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com