PM7347 datasheet(119/341 Pages) PMC

119 / 341 page

S/UNI®-JET Data Sheet

Released

Proprietary and Confidential to PMC-Sierra, Inc., and for its Customers’ Internal Use

119

Document ID: PMC-1990267, Issue 3

Bit

Type

Function

Default

Bit 7

PERR[7]

Bit 6

PERR[6]

Bit 5

PERR[5]

Bit 4

PERR[4]

Bit 3

PERR[3]

Bit 2

PERR[2]

Bit 1

PERR[1]

Bit 0

PERR[0]

Bit

Type

Function

Default

Bit 7

PERR[15]

Bit 6

PERR[14]

Bit 5

PERR[13]

Bit 4

PERR[12]

Bit 3

PERR[11]

Bit 2

PERR[10]

Bit 1

PERR[9]

Bit 0

PERR[8]

PERR[15:0]

PERR[15:0] represents the number of DS3 P-bit errors, the number of E3 G.832 BIP-8 errors

or the number of J2 CRC-5 errors that have been detected since the last time the parity error

counter was polled.

The counter (and all other counters in the PMON) is polled by writing to any of the PMON

Global Monitor Update Register (006H). Such a write transfers the internally accumulated

count to the PERR Error Count Registers and simultaneously resets the internal counter to

begin a new cycle of error accumulation. This transfer and reset is carried out in a manner

that coincident events are not lost. The transfer takes 255 RCLK cycles to complete in DS3

mode and three RCLK cycles to complete in E3 and J2 mode.

This counter is paused when the corresponding framer has lost frame alignment.

PM7347 Datasheet(PDF) 119 Page - PMC-Sierra, Inc

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