ADS1294CZXGR datasheet(44/114 Pages) TI2

44 / 114 page

ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R

SBAS459K – JANUARY 2010 – REVISED AUGUST 2015

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9.3.1.7.7

Pace Detect

The ADS129x provide flexibility for pace detection by using either software or external hardware. The software

approach is made possible by providing sampling rates up to 32 kSPS. The external hardware approach is made

possible by bringing out the output of the PGA at two pins: TESTP_PACE_OUT1 and TESTN_PACE_OUT2. If

the WCT amplifier is connected to the signal path, switching noise occurs as a result of chopping; see the Wilson

Central Terminal (WCT) and Chest Leads section for details.

9.3.1.7.7.1

Software Approach

To use the software approach, operate the device at 8 kSPS or more to capture the fastest pulse. Afterwards,

digital signal processing is used to identify the presence of the pacemaker pulse. The software approach gives

the utmost flexibility to program the pace detect threshold on-the-fly (dynamically) using software. This flexibility

is increasingly important as pacemakers evolve over time. Two parameters must be considered while measuring

fast pace pulses:

1. PGA bandwidth: determines the gain setting that can be used; shown in Table 5.

2. Settling time: determines the operating data rate for the device. For a step change in input, the digital

decimation filter takes 3 × tDR to settle.

9.3.1.7.7.2

External Hardware Approach

One of the drawbacks of using the software approach is that all channels on a single device must operate at

higher data rates. For systems where high data rates are a problem, the ADS129x provide the option of

connecting external hardware to the output of the PGA to detect the presence of the pulse. The output of the

pace detection logic is then fed into the device through one of the GPIO pins. The GPIO data are transmitted

through the SPI port and loaded 2 tCLKs before DRDY goes low. Two of the eight channels are selected using

channels. During the differential to single-ended conversion, there is an attenuation of 0.4; therefore, the total

gain in the pace path is equal to (0.4 × PGA_GAIN). The pace output signals are multiplexed with the TESTP

and TESTN signals through the TESTP_PACE_OUT1 and TESTN_PACE_OUT2 pins, respectively. Channel

selection is achieved by setting bits[4:1] of the PACE register. If the pace circuitry is not used, turn off the pace

amplifiers by using the PD_PACE bit in the PACE register.

If the output of a channel connected to the WCT amplifier (for example, the V-lead channels) is connected to one

of the pace amplifiers for external pace detection, chopping artifacts appear at the pace amplifier output. See the

Wilson Central Terminal (WCT) and Chest Leads section for more details.

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ADS1294CZXGR Datasheet(PDF) 44 Page - Texas Instruments