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ADS1294CZXGR Datasheet(PDF) 71 Page - Texas Instruments |
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ADS1294CZXGR Datasheet(HTML) 71 Page - Texas Instruments |
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71 / 114 page  ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R www.ti.com SBAS459K – JANUARY 2010 – REVISED AUGUST 2015 9.6.1.6 CHnSET: Individual Channel Settings (n = 1 to 8) (address = 05h to 0Ch) (reset = 00h) The CH[1:8]SET control register configures the power mode, PGA gain, and multiplexer settings channels. See the Input Multiplexer section for details. CH[2:8]SET are similar to CH1SET, corresponding to the respective channels. Figure 79. CHnSET: Individual Channel Settings Register 7 6 5 4 3 2 1 0 PDn GAINn[2:0] 0 MUXn[2:0] R/W-0h R/W-0h R/W-0h R/W-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 22. Individual Channel Settings (n = 1 to 8) Field Descriptions Bit Field Type Reset Description 7 PDn R/W 0h Power-down This bit determines the channel power mode for the corresponding channel. 0 = Normal operation 1 = Channel power-down. When powering down a channel, TI recommends that the channel be set to input short by setting the appropriate MUXn[2:0] = 001 of the CHnSET register. 6:4 GAINn[2:0] R/W 0h PGA gain These bits determine the PGA gain setting. 000 = 6 001 = 1 010 = 2 011 = 3 100 = 4 101 = 8 110 = 12 3 RESERVED R/W 0h Reserved Always write 0h 2:0 MUXn[2:0] R/W 0h Channel input These bits determine the channel input selection. 000 = Normal electrode input 001 = Input shorted (for offset or noise measurements) 010 = Used in conjunction with RLD_MEAS bit for RLD measurements. See the Right Leg Drive (RLD) DC Bias Circuit subsection of the ECG-Specific Functions section for more details. 011 = MVDD for supply measurement 100 = Temperature sensor 101 = Test signal 110 = RLD_DRP (positive electrode is the driver) 111 = RLD_DRN (negative electrode is the driver) Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 71 Product Folder Links: ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R |
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