ADS1294CZXGR datasheet(54/114 Pages) TI2

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START

DRDY

4 / f

CLK

4 / f

CLK

Data Updating

SETTLE

ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R

SBAS459K – JANUARY 2010 – REVISED AUGUST 2015

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9.4.1.3.3

Data Format

The ADS129x output 24 bits of data per channel in binary twos complement format, MSB first. The LSB has a

weight of VREF / (2

23 – 1). A positive full-scale input produces an output code of 7FFFFFh and the negative full-

scale input produces an output code of 800000h. The output clips at these codes for signals exceeding full-scale.

Table 13 summarizes the ideal output codes for different input signals. For DR[2:0] = 000 and 001, the device

has only 17 and 19 bits of resolution, respectively. The last seven (in 17-bit mode) or five (in 19-bit mode) bits

can be ignored.

Table 13. Ideal Output Code versus Input Signal(1)

INPUT SIGNAL, VIN

(INxP – INxN)

IDEAL OUTPUT CODE(2)

≥ VREF

7FFFFFh

VREF / (2

23 – 1)

000001h

000000h

–VREF / (2

23 – 1)

FFFFFFh

≤ –VREF (2

23 / (223 – 1))

800000h

(1)

Only valid for 24-bit resolution data rates, with gain = 1.

(2)

Excludes effects of noise, linearity, offset, and gain error.

9.4.1.4 Single-Shot Mode

Enable single-shot mode by setting the SINGLE_SHOT bit in CONFIG4 register to 1. In single-shot mode, the

ADS129x perform a single conversion when the START pin is taken high, or when the START opcode command

is sent. As seen in Figure 62, when a conversion completes, DRDY goes low and further conversions are

stopped. Regardless of whether the conversion data are read or not, DRDY remains low. To begin a new

conversion, take the START pin low and then back high for at least two tCLKs, or transmit the START opcode

again. When switching from continous conversion mode to single-shot mode, make sure the START signal is

pulsed, or issue a STOP command followed by a START command.

Figure 62. DRDY With No Data Retrieval in Single-Shot Mode

Single-shot conversion mode is provided for applications that require nonstandard or noncontinuous data rates.

Issue a START command or toggle the START pin high to reset the digital filter, effectively dropping the data

rate by a factor of four. This mode leaves the system more susceptible to aliasing effects, thus requiring more

complex analog or digital filtering. Loading on the host processor increases because it must toggle the START

pin or send a START command to initiate a new conversion cycle.

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Product Folder Links: ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R

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