ADS1294CZXGR datasheet(85/114 Pages) TI2

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Set

= 1

Set

= 1

PDWN

RESET

Wait at least t

for

Power-On Reset

POR

// If START is Tied High, After This Step

Toggles at f

/8192

// (LP Mode with DR = f

/1024)

DRDY

CLK

MOD

Set CLKSEL Pin = 1

and Wait for Oscillator

to Wake Up

Analog/Digital Power-Up

// Follow Power-Up Sequencing

External

Clock

Set CLKSEL Pin = 0

and Provide External Clock

= 2.048MHz

CLK

Yes

Set PDB_REFBUF = 1

and Wait for Internal Reference

to Settle

Write Certain Registers,

Including Input Short

Set START = 1

// Activate Conversion

// After This Point

Should Toggle at

// f

/4096

DRDY

CLK

// Set Device in HR Mode and DR = f

/1024

WREG CONFIG1 0x86

WREG CONFIG2 0x00

// Set All Channels to Input Short

WREG CHnSET 0x01

MOD

Yes

RDATAC

// Put the Device Back in RDATAC Mode

RDATAC

Capture Data

and Check Noise

// Look for

and Issu

DRDY

e 24 + n

24 SCLK

Set Test Signals

Capture Data

and Test Signal

// Activate a (1mV

/2.

4) Square-Wave Test Signal

// On All Channels

SDATAC

WREG CONFIG2 0x10

WREG CHnSET

0x05

RDATAC

REF

// Look for

and Issu

DRDY

e 24 + n

24 SCLK

External

Reference

// If Using Internal Reference, Send This Command

WREG CONFIG3 0xC0

Send SDATAC

Command

// Device Wakes Up in RDATAC Mode, so Send

// SDATAC Command so Registers can be Written

SDATAC

Issue Reset Pulse,

Wait for 18 t

CLK

// Activate DUT

can be Either Tied Permanently Low

// Or Selectively Pulled Low Before Sending

// Commands or Reading/Sending Data from/to Device

VCAP1

1.1V

// Delay for Power-On Reset and Oscillator Start-Up

// If VCAP1 < 1.1V at t

, continue waiting until VCAP1

1.1V

POR

Yes

ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R

www.ti.com

SBAS459K – JANUARY 2010 – REVISED AUGUST 2015

Application Information (continued)

Figure 93. Initial Flow at Power Up

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Product Folder Links: ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R

ADS1294CZXGR Datasheet(PDF) 85 Page - Texas Instruments

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