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ADS1294CZXGR Datasheet(PDF) 72 Page - Texas Instruments |
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ADS1294CZXGR Datasheet(HTML) 72 Page - Texas Instruments |
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72 / 114 page  ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R SBAS459K – JANUARY 2010 – REVISED AUGUST 2015 www.ti.com 9.6.1.7 RLD_SENSP: RLD Positive Signal Derivation Register (address = 0Dh) (reset = 00h) This register controls the selection of the positive signals from each channel for right leg drive (RLD) derivation. See the Right Leg Drive (RLD) DC Bias Circuit section for details. Registers bits[5:4] are not available for the ADS1294 or ADS1294R. Bits[7:6] are not available for the ADS1294, ADS1294R, ADS1296, or ADS1296R. Figure 80. RLD_SENSP: RLD Positive Signal Derivation Register 7 6 5 4 3 2 1 0 RLD8P RLD7P RLD6P RLD5P RLD4P RLD3P RLD2P RLD1P R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h R/W-0h LEGEND: R/W = Read/Write; R = Read only; -n = value after reset Table 23. RLD Positive Signal Derivation Field Descriptions Bit Field Type Reset Description 7 RLD8P R/W 0h IN8P to RLD Route channel 8 positive signal into RLD derivation 0: Disabled 1: Enabled 6 RLD7P R/W 0h IN7P to RLD Route channel 7 positive signal into RLD derivation 0: Disabled 1: Enabled 5 RLD6P R/W 0h IN6P to RLD Route channel 6 positive signal into RLD derivation 0: Disabled 1: Enabled 4 RLD5P R/W 0h IN5P to RLD Route channel 5 positive signal into RLD derivation 0: Disabled 1: Enabled 3 RLD4P R/W 0h IN4P to RLD Route channel 4 positive signal into RLD derivation 0: Disabled 1: Enabled 2 RLD3P R/W 0h IN3P to RLD Route channel 3 positive signal into RLD derivation 0: Disabled 1: Enabled 1 RLD2P R/W 0h IN2P to RLD Route channel 2 positive signal into RLD channel 0: Disabled 1: Enabled 0 RLD1P R/W 0h IN1P to RLD Route channel 1 positive signal into RLD channel 0: Disabled 1: Enabled 72 Submit Documentation Feedback Copyright © 2010–2015, Texas Instruments Incorporated Product Folder Links: ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R |
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