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ADS1294CZXGR Datasheet(PDF) 63 Page - Texas Instruments |
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ADS1294CZXGR Datasheet(HTML) 63 Page - Texas Instruments |
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63 / 114 page ![]() Hi-Z START DRDY CS SCLK DIN DOUT RDATAOpcode Status Register+8-ChannelData(216Bits) RDATAOpcode ADS1294, ADS1294R, ADS1296, ADS1296R, ADS1298, ADS1298R www.ti.com SBAS459K – JANUARY 2010 – REVISED AUGUST 2015 9.5.2.7 SDATAC: Stop Read Data Continuous This SDATAC opcode command cancels read data continuous (RDATAC) mode. There is no restriction on the SCLK rate for this command, but the next command must wait for 4 tCLK cycles. 9.5.2.8 RDATA: Read Data Issue the RDATA command after DRDY goes low to read the conversion result (in SDATAC mode). There is no restriction on the SCLK rate for this command, and there is no wait time needed for the subsequent commands or data retrieval SCLKs. To retrieve data from the device after RDATA command is issued, make sure that either the START pin is high or the START command is issued. When reading data with the RDATA command, the read operation can overlap the occurrence of the next DRDY without data corruption. Figure 71 shows the recommended way to use the RDATA command. RDATA is best suited for ECG- and EEG-type systems, where register settings must be read or changed often between conversion cycles. Figure 71. RDATA Usage 9.5.2.9 Sending Multibyte Commands The ADS129x serial interface decodes commands in bytes, and requires 4 tCLK periods to decode and execute. Therefore, when sending multibyte commands, a 4 tCLK period must separate the end of one byte (or opcode) and the next. For example, if CLK is 2.048 MHz, then tSDECODE (4 × tCLK) is 1.96 µs. When SCLK is 16 MHz, the maximum transfer speed for one byte is 500 ns. This byte transfer time does not meet the tSDECODE specification; therefore, a delay must be inserted so that the end of the second byte arrives 1.46 µs later. However, if SCLK is 4 MHz, one byte is transferred in 2 µs. Because this transfer time exceeds the tSDECODE specification, the processor can send subsequent bytes without delay. In the second scenario, the serial port can be programmed to use multiple- byte transfers instead of the single-byte transfers required to meet the timing of the first scenario . Copyright © 2010–2015, Texas Instruments Incorporated Submit Documentation Feedback 63 Product Folder Links: ADS1294 ADS1294R ADS1296 ADS1296R ADS1298 ADS1298R |
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