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TAS5548 Datasheet(PDF) 20 Page - Texas Instruments

Part # TAS5548
Description  TAS5548 8-Channel HD Compatible Audio Processor with ASRC and PWM Output
PDF  118 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

TAS5548 Datasheet(HTML) 20 Page - Texas Instruments

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TAS5548
SLES270A – NOVEMBER 2012 – REVISED APRIL 2015
www.ti.com
Feature Description (continued)
This section describes some of these controls and status functions. The I2C summary and detailed register
descriptions are contained in Register Maps and I 2C Serial-Control Interface.
7.3.6.1 I2C Status Registers
The TAS5548 has two status registers that provide general device information. These are the general status
register 0 (0x01) and the error status register (0x02).
7.3.6.1.1
General Status Register (0x01)
•
Device identification code
7.3.6.1.2
Error Status Register (0x02)
•
No internal errors (the valid signal is high)
•
Audio Clip indicator. Writing to the register clears the indicator.
•
This error status register is normally used for system development only.
7.3.6.2 TAS5548 Pin Controls
The TAS5548 provide a number of terminal controls to manage the device operation. These controls are:
•
RESET
•
PDN
•
BKND_ERR
•
HP_SEL
•
MUTE
•
PSVC
•
EMO1 (see System Power Contoller section)
•
EMO2 (see System Power Contoller section)
7.3.6.2.1
Reset (RESET)
The TAS5548 is placed in the reset mode either by the power-up reset circuitry when power is applied, or by
setting the RESET terminal low.
RESET is an asynchronous control signal that restores the TAS5548 to the hard-mute state (Non PWM
Switching). Master volume is immediately set to full attenuation (there is no ramp down). Reset initiates the
device reset without an MCLK input. As long as the RESET terminal is held low, the device is in the reset state.
During reset, all I2C and serial data bus operations are ignored.
Table 1 shows the device output signals while RESET is active.
Table 1. Device Outputs During Reset
SIGNAL
SIGNAL STATE
Valid
Low
PWM P-outputs
Low (Non PWM Switching)
PWM M-outputs
Low (Non PWM Switching)
SDA
Signal input (not driven)
Because RESET is an asynchronous signal, clicks and pops produced during the application (the leading edge)
of RESET cannot be avoided. However, the transition from the hard-mute state (Non PWM Switching) to the
operational state is performed using a quiet start-up sequence to minimize noise. This control uses the PWM
reset and unmute sequence to shut down and start up the PWM. If a completely quiet reset or power-down
sequence is desired, MUTE should be applied before applying RESET.
The rising edge of the reset pulse begins device initialization before the transition to the operational mode.
During device initialization, all controls are reset to their initial states. Table 2 shows the default control settings
following a reset.
20
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Product Folder Links: TAS5548



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