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TAS5548 Datasheet(PDF) 8 Page - Texas Instruments |
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TAS5548 Datasheet(HTML) 8 Page - Texas Instruments |
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8 / 118 page  TAS5548 SLES270A – NOVEMBER 2012 – REVISED APRIL 2015 www.ti.com 6.8 Timing I 2C Serial Control Port Operation Timing Characteristics for I 2C Interface Signals over recommended operating conditions (unless otherwise noted) STANDARD MODE FAST MODE UNIT MIN MAX MIN MAX fSCL SCL clock frequency 0 100 0 400 kHz Hold time (repeated) START condition. After tHD-STA 4 0.6 μs this period, the first clock pulse is generated. tLOW LOW period of the SCL clock 4.7 1.3 μs tHIGH HIGH period of the SCL clock 4 0.6 μs tSU-STA Setup time for repeated START 4.7 0.6 μs tSU-DAT Data setup time 250 200 ns tHD-DAT Data hold time 0 3.45 0 0.9 μs tr Rise time of both SDA and SCL, see Figure 1 1000 20 + 0.1 Cb 500 ns tf Fall time of both SDA and SCL, see Figure 1 300 20 + 0.1 Cb 300 ns tSU-STO Setup time for STOP condition 4 0.6 μs Bus free time between a STOP and START tBUF 4.7 1.3 μs condition Cb Capacitive loads for each bus line 400 400 pF Noise margin at the LOW level for each VnL 0.1 × VDD 0.1 × VDD V connected device (including hysteresis) Noise margin at the HIGH level for each VnH 0.2 × VDD 0.2 × VDD V connected device (including hysteresis) 6.9 Reset Timing (RESET) Control signal parameters over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT tr(DMSTATE) Time to Non PWM Switching low 400 ns tw(RESET) Pulse duration, RESET active, see Figure 3 400 None ns tr(I2C_ready) Time to enable I2C 5 ms 6.10 Power-Down (PDN) Timing Control signal parameters over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT tp(DMSTATE) Time to Non PWM Switching low 650 μs Number of MCLKs preceding the release of PDN, see Figure 4 5 tsu Device startup time 200 µs Time to audio output 160 mS 6.11 Back-End Error (BKND_ERR) Control signal parameters over recommended operating conditions (unless otherwise noted) PARAMETER MIN TYP MAX UNIT tw(ER) Pulse duration, BKND_ERR active, see Figure 5 350 None ns tp(valid_low) Minimum amount of time that device asserts VALID low. <100 μs tp(valid_high) I2C programmable to be between <1mS to 1.2 seconds (to avoid glitching with –25 25 % of interval persistent BKND_ERR) 8 Submit Documentation Feedback Copyright © 2012–2015, Texas Instruments Incorporated Product Folder Links: TAS5548 |
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