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AM625 Datasheet(PDF) 149 Page - Texas Instruments

Part # AM625
Description  AM62x Sitara™ Processors
PDF  276 Pages
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Manufacturer  TI2 [Texas Instruments]
Direct Link  https://www.ti.com
Logo TI2 - Texas Instruments

AM625 Datasheet(HTML) 149 Page - Texas Instruments

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Table 6-66. GPMC and NOR Flash Switching Characteristics – Synchronous Mode (continued)
see Figure 6-46, Figure 6-47, Figure 6-48, Figure 6-49, and Figure 6-50
NO.
PARAMETER
DESCRIPTION
MIN
MAX
UNIT
F6
td(be[x]nV-clk)
Delay time, GPMC_BE0n_CLE, GPMC_BE1n valid to
GPMC_CLK first edge
B(2) - 2.3
B(2) + 1.9
ns
F7
td(clkH-be[x]nIV)
Delay time, GPMC_CLK rising edge to GPMC_BE0n_CLE,
GPMC_BE1n invalid
D(4) - 2.3
D(4) + 1.9
ns
F8
td(clkH-advn)
Delay time, GPMC_CLK rising edge to GPMC_ADVn_ALE
transition
G(6) - 2.3
G(6) + 4.5
ns
F9
td(clkH-advnIV)
Delay time, GPMC_CLK rising edge to GPMC_ADVn_ALE
invalid
D(4) - 2.3
D(4) + 4.5
ns
F10
td(clkH-oen)
Delay time, GPMC_CLK rising edge to GPMC_OEn_REn
transition
H(7) - 2.3
H(7) + 3.5
ns
F11
td(clkH-oenIV)
Delay time, GPMC_CLK rising edge to GPMC_OEn_REn
invalid
D(4) - 2.3
D(4) + 3.5
ns
F14
td(clkH-wen)
Delay time, GPMC_CLK rising edge to GPMC_WEn transition
I(8) - 2.3
I(8) + 4.5
ns
F15
td(clkH-do)
Delay time, GPMC_CLK rising edge to GPMC_AD[15:0]
transition(9)
- 2.3
+ 2.7
ns
F15
td(clkL-do)
Delay time, GPMC_CLK falling edge to GPMC_AD[15:0] data
bus transition(10)
- 2.3
+ 2.7
ns
F15
td(clkL-do).
Delay time, GPMC_CLK falling edge to GPMC_AD[15:0] data
bus transition(11)
- 2.3
+ 2.7
ns
F17
td(clkH-be[x]n)
Delay time, GPMC_CLK rising edge to GPMC_BE0n_CLE,
GPMC_BE1n transition(9)
- 2.3
+ 1.9
ns
F17
td(clkL-be[x]n)
Delay time, GPMC_CLK falling edge to GPMC_BE0n_CLE,
GPMC_BE1n transition(10)
- 2.3
+ 1.9
ns
F17
td(clkL-be[x]n).
Delay time, GPMC_CLK falling edge to GPMC_BE0n_CLE,
GPMC_BE1n transition(11)
- 2.3
+ 1.9
ns
F18
tw(csnV)
Pulse duration, GPMC_CSn[i](12) low
A(1)
ns
F19
tw(be[x]nV)
Pulse duration, GPMC_BE0n_CLE, GPMC_BE1n low
C(3)
ns
F20
tw(advnV)
Pulse duration, GPMC_ADVn_ALE low
K(14)
ns
(1)
For single read: A = (CSRdOffTime - CSOnTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For single write: A = (CSWrOffTime - CSOnTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For burst read: A = (CSRdOffTime - CSOnTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For burst write: A = (CSWrOffTime - CSOnTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
With n being the page burst access number.
(2)
Address bus / Byte Enables become valid at start of cycle, GPMC_CLK activation time may be delayed after start of cycle B =
ClkActivationTime × GPMC_FCLK(15)
(3)
For single read: C = RdCycleTime × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For single write: C = WrCycleTime × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For burst read: C = (RdCycleTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For burst write: C = (WrCycleTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
With n being the page burst access number.
(4)
For single read: D = (RdCycleTime - RdAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For single write: D = (WrCycleTime - WrAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For burst read: D = (RdCycleTime - RdAccessTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
For burst write: D = (WrCycleTime - WrAccessTime + (n - 1) × PageBurstAccessTime) × (TimeParaGranularity + 1) × GPMC_FCLK(15)
With n being the page burst access number.
(5)
For CSn falling edge (CS activated):
•
Case GPMCFCLKDIVIDER = 0:
–
F = 0.5 × CSExtraDelay × GPMC_FCLK(15)
•
Case GPMCFCLKDIVIDER = 1:
–
F = 0.5 × CSExtraDelay × GPMC_FCLK(15) if (ClkActivationTime and CSOnTime are odd) or (ClkActivationTime and
CSOnTime are even)
–
F = (1 + 0.5 × CSExtraDelay) × GPMC_FCLK(15) otherwise
•
Case GPMCFCLKDIVIDER = 2:
–
F = 0.5 × CSExtraDelay × GPMC_FCLK(15) if ((CSOnTime - ClkActivationTime) is a multiple of 3)
www.ti.com
AM625, AM625-Q1, AM623, AM620-Q1
SPRSP58C – JUNE 2022 – REVISED OCTOBER 2025
Copyright © 2025 Texas Instruments Incorporated
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Product Folder Links: AM625 AM625-Q1 AM623 AM620-Q1



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