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M58WT032KB Datasheet(PDF) 34 Page - Numonyx B.V |
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M58WT032KB Datasheet(HTML) 34 Page - Numonyx B.V |
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34 / 117 page  Command interface - factory program commands M58WTxxxKT, M58WTxxxKB 34/117 6.4.3 Program and verify phase In the program and verify phase the four words that were loaded in the load phase are programmed in the memory array and then verified by the Program/Erase Controller. If any errors are found, the Program/Erase Controller reprograms the location. During this phase the Status Register shows that the Program/Erase Controller is busy, the Status Register bit SR7 is set to ‘0’, and that the device is not waiting for new data (Status Register bit SR0 set to ‘1’). When Status Register bit SR0 is set to ‘0’ the program and verify phase has terminated. Once the verify phase has successfully completed, subsequent pages in the same block can be loaded and programmed. The device returns to the beginning of the load phase by issuing one bus write operation to latch the address and the first of the four new words to be programmed. 6.4.4 Exit phase Finally, after all the pages have been programmed, write one bus write operation with data FFFFh to any address outside the block containing the start address, to terminate the load and program and verify phases. Status Register bit SR7 set to ‘1’ and bit SR0 set to ‘0’ indicate that the Quadruple Enhanced Factory Program command has terminated. A full Status Register check should be done to ensure that the block has been successfully programmed. See Section 7: Status Register for more details. If the program and verify phase has successfully completed the memory returns to read mode. If the P/EC fails to program and reprogram a given location, the error is signaled in the Status Register. |
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