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M58WT032KB Datasheet(PDF) 37 Page - Numonyx B.V |
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M58WT032KB Datasheet(HTML) 37 Page - Numonyx B.V |
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37 / 117 page  M58WTxxxKT, M58WTxxxKB Status Register 37/117 7.2 Erase suspend status bit (SR6) The erase suspend status bit indicates that an erase operation has been suspended or is going to be suspended in the addressed block. When the erase suspend status bit is High (set to ‘1’), a Program/Erase Suspend command has been issued and the memory is waiting for a Program/Erase Resume command. The erase suspend status should only be considered valid when the Program/Erase Controller status bit is High (Program/Erase Controller inactive). SR7 is set within the erase suspend latency time of the Program/Erase Suspend command being issued, therefore, the memory may still complete the operation rather than entering the suspend mode. When a Program/Erase Resume command is issued the erase suspend status bit returns Low. 7.3 Erase status bit (SR5) The erase status bit identifies if the memory has failed to verify that the block has erased correctly. When the erase status bit is High (set to ‘1’), the Program/Erase Controller has applied the maximum number of pulses to the block and still failed to verify that it has erased correctly. The erase status bit should be read once the Program/Erase Controller status bit is High (Program/Erase Controller inactive). Once set High, the erase status bit can only be reset Low by a Clear Status Register command or a hardware reset. If set High it should be reset before a new program or erase command is issued, otherwise the new command appears to fail. 7.4 Program status bit (SR4) The program status bit identifies a program failure or an attempt to program a ‘1’ to an already programmed bit when VPP = VPPH. When the program status bit is High (set to ‘1’), the Program/Erase Controller has applied the maximum number of pulses to the byte and still failed to verify that it has programmed correctly. After an attempt to program a '1' to an already programmed bit, the program status bit SR4 only goes High (set to '1') if VPP = VPPH (if VPP is different from VPPH, SR4 remains Low (set to '0') and the attempt is not shown). The program status bit should be read once the Program/Erase Controller status bit is High (Program/Erase Controller inactive). Once set High, the program status bit can only be reset Low by a Clear Status Register command or a hardware reset. If set High it should be reset before a new command is issued, otherwise the new command appears to fail. |
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