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M58WT032KB Datasheet(PDF) 44 Page - Numonyx B.V |
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M58WT032KB Datasheet(HTML) 44 Page - Numonyx B.V |
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44 / 117 page  Configuration Register M58WTxxxKT, M58WTxxxKB 44/117 Table 11. Configuration Register Bit Description Value Description CR15 Read select 0 Synchronous read 1 Asynchronous read (default at power-on) CR14 Reserved CR13-CR11 X latency 010 2 clock latency 011 3 clock latency 100 4 clock latency 101 5 clock latency 111 Reserved (default) Other configurations reserved CR10 Wait polarity 0 WAIT is active Low 1 WAIT is active High (default) CR9 Data output configuration 0 Data held for one clock cycle 1 Data held for two clock cycles (default) CR8 Wait configuration 0 WAIT is active during wait state 1 WAIT is active one data cycle before wait state (default) CR7 Burst type 0 Interleaved 1 Sequential (default) CR6 Valid clock edge 0 Falling Clock edge 1 Rising Clock edge (default) CR5-CR4 Reserved CR3 Wrap burst 0Wrap 1 No wrap (default) CR2-CR0 Burst length 001 4 words 010 8 words 011 16 words 111 Continuous (CR7 must be set to ‘1’) (default) |
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