M58WT032KB datasheet(94/117 Pages) NUMONYX

94 / 117 page

Common Flash interface

M58WTxxxKT, M58WTxxxKB

94/117

Table 39.

Protection Register information(1)

Offset

Data

Description

Value

(P+E)h = 47h

0001h

Number of protection register fields in JEDEC ID space. 0000h indicates

that 256 fields are available.

(P+F)h = 48h

0080h

Protection Field 1: Protection Description

Bits 0-7 Lower byte of protection register address

Bits 8-15 Upper byte of protection register address

Bits 16-23 2n bytes in factory pre-programmed region

Bits 24-31 2n bytes in user programmable region

0080h

(P+10)h = 49h

0000h

(P+11)h =

4Ah

0003h

8 bytes

(P+12)h= 4Bh

0004h

16 bytes

The variable P is a pointer that is defined at CFI offset 15h.

Table 40.

Burst read information(1)

Offset

Data

Description

Value

(P+13)h = 4Ch

0003h

Page-mode read capability

bits 0-7 ’n’ such that 2n HEX value represents the number of read-page

bytes. See offset 28h for device word width to determine page-mode data

output width.

8 bytes

(P+14)h = 4Dh

0004h

Number of synchronous mode read configuration fields that follow.

(P+15)h = 4Eh

0001h

Synchronous mode read capability configuration 1

bit 3-7 Reserved

bit 0-2 ’n’ such that 2n+1 HEX value represents the maximum number of

continuous synchronous reads when the device is configured for its

maximum word width. A value of 07h indicates that the device is capable of

continuous linear bursts that will output data until the internal burst counter

reaches the end of the device’s burstable address space. This field’s 3-bit

value can be written directly to the read configuration register bit 0-2 if the

device is configured for its maximum word width. See offset 28h for word

width to determine the burst data output width.

(P+16)h = 4Fh

0002h

Synchronous mode read capability configuration 2

(P+17)h = 50h

0003h

Synchronous mode read capability configuration 3

(P+18)h = 51h

0007h

Synchronous mode read capability configuration 4

Cont.

The variable P is a pointer that is defined at CFI offset 15h.

Table 41.

Bank and erase block region information(1) (2)

M58WT032KT,

M58WT064KT

M58WT032KB,

M58WT064KB

Description

Offset

Data

Offset

Data

(P+19)h = 52h

02h

(P+19)h = 52h

02h

Number of bank regions within the device

The variable P is a pointer that is defined at CFI offset 15h.

Bank regions. There are two bank regions, see Tables 30, 31, 32 and 33.

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