M58WT032KB datasheet(96/117 Pages) NUMONYX

Part #	M58WT032KB

Description	32- and 64-Mbit (횞16, multiple bank, burst) 1.8 V core, 3.0 V I/O supply Flash memories

PDF	117 Pages

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Manufacturer	NUMONYX [Numonyx B.V]

Direct Link	http://www.numonyx.com

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96 / 117 page

Common Flash interface

M58WTxxxKT, M58WTxxxKB

96/117

(P+28)h = 61h

06h

Bank Region 1 Erase Block Type 2 Information

Bits 0-15: n+1 = number of identical-sized erase blocks

Bits 16-31: n×256 = number of bytes in erase block region

(P+29)h = 62h

00h

(P+2A)h = 63h

00h

(P+2B)h = 64h

01h

(P+2C)h = 65h

64h

Bank Region 1 (Erase Block Type 2)

Minimum block erase cycles × 1000

(P+2D)h = 66h

00h

(P+2E)h = 67h

01h

Bank Regions 1 (Erase Block Type 2): BIts per cell, internal

ECC

Bits 0-3: bits per cell in erase region

Bit 4: reserved for “internal ECC used”

BIts 5-7: reserved

(P+2F)h = 68h

03h

Bank Region 1 (Erase Block Type 2): page mode and

synchronous mode capabilities

Bit 0: Page-mode reads permitted

Bit 1: Synchronous reads permitted

Bit 2: Synchronous writes permitted

Bits 3-7: reserved

The variable P is a pointer which is defined at CFI offset 15h.

Applies to M58WT032KT.

Applies to M58WT064KT.

Bank Regions. There are two Bank Regions, see Tables 30, 31, 32 and 33.

Table 42.

Bank and erase block region 1 information(1) (continued)

M58WT032KT,

M58WT064KT

M58WT032KB,

M58WT064KB

Description

Offset

Data

Offset

Data

M58WT032KB Datasheet(PDF) 96 Page - Numonyx B.V

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