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M58WT032KB Datasheet(PDF) 48 Page - Numonyx B.V |
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M58WT032KB Datasheet(HTML) 48 Page - Numonyx B.V |
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48 / 117 page  Read modes M58WTxxxKT, M58WTxxxKB 48/117 9 Read modes Read operations can be performed in two different ways depending on the settings in the Configuration Register. If the clock signal is ‘don’t care’ for the data output, the read operation is asynchronous. If the data output is synchronized with clock, the read operation is synchronous. The read mode and data output format are determined by the Configuration Register (see Section 8: Configuration Register for details). All banks supports both asynchronous and synchronous read operations. The multiple bank architecture allows read operations in one bank, while write operations are being executed in another (see Tables 13 and 14). 9.1 Asynchronous read mode In asynchronous read operations the clock signal is ‘don’t care’. The device outputs the data corresponding to the address latched, that is the memory array, Status Register, common Flash interface or electronic signature, depending on the command issued. CR15 in the Configuration Register must be set to ‘1’ for asynchronous operations. In asynchronous read mode a page of data is internally read and stored in a page buffer. The page has a size of 4 words and is addressed by A0 and A1 address inputs. The address inputs A0 and A1 are not gated by Latch Enable in asynchronous read mode. The first read operation within the page has a longer access time (Tacc, random access time), and subsequent reads within the same page have much shorter access times. If the page changes then the normal, longer timings apply again. Asynchronous read operations can be performed in two different ways, Asynchronous random access read and asynchronous page read. Only asynchronous page read takes full advantage of the internal page storage so different timings are applied. During asynchronous read operations, after a bus inactivity of 150 ns, the device automatically switches to automatic standby mode. In this condition the power consumption is reduced to the standby value and the outputs are still driven. In asynchronous read mode, the WAIT signal is always asserted. See Table 23: Asynchronous read AC characteristics, Figure 10: Asynchronous random access read AC waveforms and Figure 11: Asynchronous page read AC waveforms for details. |
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