F24 datasheet(106/210 Pages) RENESAS

106 / 210 page

RL78/F23, F24

4. ELECTRICAL SPECIFICATIONS (GRADE 4)

R01DS0446EJ0120 Rev.1.20

Page 106 of 207

Dec 31, 2025

(TA = -40 to +125

°C, 2.7 V ≤ EVDD0 = EVDD1 = VDD ≤ 5.5 V, VSS = EVSS0 = EVSS1 = 0 V)

(6/6)

Items

Symbol

Conditions

MIN.

TYP.

MAX.

Unit

Input leakage

current, high

ILIH1

P00 to P03, P10 to P17, P30 to P32,

P40 to P47, P50 to P57, P60 to P67,

P70 to P77, P106, P107, P120, P125

to P127, P140, P150 to P157

VI = EVDD0

µA

ILIH2

P33, P34, P80 to P87, P90 to P97,

P100 to P105, P137, RESET

VI = VDD

µA

ILIH3

P121 to P124

(X1, X2, XT1, XT2, EXCLK, EXCLKS)

VI = VDD

In input port or

external clock input

µA

In resonator

connection

µA

Input leakage

current, low

ILIL1

P00 to P03, P10 to P17, P30 to P32,

P40 to P47, P50 to P57, P60 to P67,

P70 to P77, P106, P107, P120, P125

to P127, P140, P150 to P157

VI = EVSS0

-1

µA

ILIL2

P33, P34, P80 to P87, P90 to P97,

P100 to P105, P137, RESET

VI = VSS

-1

µA

ILIL3

P121 to P124

(X1, X2, XT1, XT2, EXCLK, EXCLKS)

VI = VSS

In input port or

external clock input

-1

µA

In resonator

connection

-10

µA

Positive injected

current Notes 1, 4

IINJPRMS

P00 to P03, P10 to P17, P30 to P32,

P41 to P47, P50 to P57, P60 to P67,

P75 to P77, P106, P107, P126, P127,

P140, P150 to P157

Per pin, VI > EVDD0

0.4

Total of all pins, VI > EVDD0

P70 to P74, P80, P83 to P87 Note 2,

P90 to P97, P100 to P105, P120,

P125

Per pin, VI > VDD

0.15

Total of all pins, VI > VDD

P81 to P84 Note 3

Total of all pins, VI > VDD

0.15

On-chip pull-up

resistance

P00 to P03, P10 to P17, P30 to P32,

P40 to P47, P50 to P57, P60 to P67,

P70 to P77, P106, P107, P120, P125

to P127, P140, P150 to P157

VI = EVSS0, in input port

100

Notes 1. These specifications are not tested on sorting and are specified based on the device characterization.

2. For RL78/F24 product: P80, P86, P87

3. For RL78/F23 product: P81, P82

4. For RL78/F24 product, P85/ANI07/IVREF0 does not guarantee the electrical characteristics when a positive

injection current is generated even if it is within the above specifications.

Caution P10 to P17, P32, P60 to P63, P70 to P72, and P120 do not output high level in N-ch open-drain mode.

Remarks 1. Unless specified otherwise, the characteristics of alternate-function pins are the same as those of the port

pins.

2. VI :This is the input voltage level to the port pins.

F24 Datasheet(PDF) 106 Page - Renesas Technology Corp

F24 Datasheet(HTML) 106 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL