4556 datasheet(35/145 Pages) RENESAS

35 / 145 page

Rev.3.02

Dec 22, 2006

page 35 of 142

REJ03B0025-0302

4556 Group

(7) Timer input/output pin

(C/CNTR pin)

CNTR pin is used to input the timer 1 count source and output the

PWM signal generated by timer 2. When the PWM signal is output

from C/CNTR pin, set “0” to the output latch of port C.

The selection of CNTR output signal can be controlled by bit 3 of

When the CNTR input is selected for timer 1 count source, timer 1

counts the waveform of CNTR input selected by bit 0 of register

W4. Also, when the CNTR input is selected, the output of port C is

invalid (high-impedance state).

(8) Timer interrupt request flags (T1F, T2F, T3F)

Each timer interrupt request flag is set to “1” when each timer

underflows. The state of these flags can be examined with the skip

instructions (SNZT1, SNZT2, SNZT3).

Use the interrupt control register V1, V2 to select an interrupt or a

skip instruction.

An interrupt request flag is cleared to “0” when an interrupt occurs

or when the next instruction is skipped with a skip instruction.

(9) Count start synchronization circuit (timer 1)

Timer 1 has the count start synchronous circuit which synchronizes

the input of INT pin, and can start the timer count operation.

Timer 1 count start synchronous circuit function is selected by set-

ting the bit 0 of register I1 to “1” and the control by INT pin input

can be performed.

When timer 1 count start synchronous circuit is used, the count

start synchronous circuit is set, the count source is input to each

timer by inputting valid waveform to INT pin.

The valid waveform of INT pin to set the count start synchronous

circuit is the same as the external interrupt activated condition.

Once set, the count start synchronous circuit is cleared by clearing

the bit I10 to “0” or reset.

However, when the count auto-stop circuit is selected, the count

start synchronous circuit is cleared (auto-stop) at the timer 1 under-

flow.

(10) Count auto-stop circuit (timer 1)

Timer 1 has the count auto-stop circuit which is used to stop timer

1 automatically by the timer 1 underflow when the count start syn-

chronous circuit is used.

The count auto-stop cicuit is valid by setting the bit 3 of register W1

to “1”. It is cleared by the timer 1 underflow and the count source to

timer 1 is stopped.

This function is valid only when the timer 1 count start synchronous

circuit is selected.

(11) Precautions

Note the following for the use of timers.

• Prescaler

Stop counting and then execute the TABPS instruction to read

from prescaler data.

Stop counting and then execute the TPSAB instruction to set

prescaler data.

• Timer count source

Stop timer 1, 2, and LC counting to change its count source.

• Reading the count value

Stop timer 1 or 2 counting and then execute the data read in-

struction (TAB1, TAB2) to read its data.

• Writing to the timer

Stop timer 1, 2 or LC counting and then execute the data write in-

struction (T1AB, T2AB, TLCA) to write its data.

• Writing to reload register R1, R2H

When writing data to reload register R1 or reload regiser R2H

while timer 1 or timer 2 is operating, avoid a timing when timer 1

or timer 2 underflows.

• Timer 2

Avoid a timing when timer 2 underflows to stop timer 2 at PWM

output function used.

When “H” interval extension function of the PWM signal is set to

be “valid”, set “1” or more to reload register R2H.

• Timer 3

Stop timer 3 counting to change its count source.

• Timer input/output pin

Set the port C output latch to “0” to output the PWM signal from

C/CNTR pin.

4556 Datasheet(PDF) 35 Page - Renesas Technology Corp

4556 Datasheet(HTML) 35 Page - Renesas Technology Corp

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL