4556 datasheet(62/145 Pages) RENESAS

62 / 145 page

Rev.3.02

Dec 22, 2006

page 62 of 142

REJ03B0025-0302

4556 Group

3. Oscillator concerns

Take care to prevent an oscillator that generates clocks for a micro-

computer operation from being affected by other signals.

(1) Keeping oscillator away from large current signal lines

Install a microcomputer (and especially an oscillator) as far as pos-

sible from signal lines where a current larger than the tolerance of

current value flows.

In the system using a microcomputer, there are signal lines for con-

trolling motors, LEDs, and thermal heads or others. When a large

current flows through those signal lines, strong noise occurs be-

cause of mutual inductance.

(2) Installing oscillator away from signal lines where potential levels

change frequently

Install an oscillator and a connecting pattern of an oscillator away

from signal lines where potential levels change frequently. Also, do

not cross such signal lines over the clock lines or the signal lines

which are sensitive to noise.

Signal lines where potential levels change frequently (such as the

CNTR pin signal line) may affect other lines at signal rising edge or

falling edge. If such lines cross over a clock line, clock waveforms

may be deformed, which causes a microcomputer failure or a pro-

gram runaway.

Fig. 58 Wiring for a large current signal line

XIN

XOUT

VSS

Microcomputer

Mutual inductance

Large

current

GND

(3) Oscillator protection using Vss pattern

As for a two-sided printed circuit board, print a Vss pattern on the

underside (soldering side) of the position (on the component side)

where an oscillator is mounted.

Connect the Vss pattern to the microcomputer Vss pin with the

shortest possible wiring. Besides, separate this Vss pattern from

other Vss patterns.

Fig. 60 Vss pattern on the underside of an oscillator

XIN

XOUT

VSS

An example of VSS patterns on the

underside of a printed circuit board

Oscillator wiring

pattern example

Separate the VSS line for oscillation from other VSS lines

XIN

XOUT

VSS

CNTR

Do not cross

N.G.

Fig. 59 Wiring to a signal line where potential levels change

frequently

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