4556 datasheet(67/145 Pages) RENESAS

67 / 145 page

Rev.3.02

Dec 22, 2006

page 67 of 142

REJ03B0025-0302

4556 Group

POF and POF2 instructions

When the POF or POF2 instruction is executed continuously af-

ter the EPOF instruction, system enters the power down state.

Note that system cannot enter the power down state when ex-

ecuting only the POF or POF2 instruction.

Be sure to disable interrupts by executing the DI instruction be-

fore executing the EPOF instruction and the POF or POF2

instruction continuously.

Power-on reset

When the built-in power-on reset circuit is used, set the time for

the supply voltage to rise from 0 V to the minimum voltage of rec-

ommended operating conditions to 100

µs or less.

If the rising time exceeds 100

µs, connect a capacitor between

the RESET pin and VSS at the shortest distance, and input “L”

level to RESET pin until the value of supply voltage reaches the

minimum operating voltage.

Voltage drop detection circuit (only in H version)

The voltage drop detection circuit detection voltage of this prod-

uct is set up lower than the minimum value of the supply voltage

of the recommended operating conditions.

When the supply voltage of a microcomputer falls below to the

minimum value of recommended operating conditions and re-

goes up (ex. battery exchange of an application product),

depending on the capacity value of the bypass capacitor added

to the power supply pin, the following case may cause program

failure (Figure 67);

supply voltage does not fall below to VRST-, and

its voltage re-goes up with no reset.

In such a case, please design a system which supply voltage is

once reduced below to VRST- and re-goes up after that.

Clock control

Execute the CRCK instruction in the initial setting routine of pro-

gram (executing it in address 0 in page 0 is recommended).

The oscillation circuit by the CRCK instruction can be selected

only once.

On-chip oscillator

The clock frequency of the on-chip oscillator depends on the sup-

ply voltage and the operation temperature range.

Be careful that variable frequencies when designing application

products.

Also, the oscillation stabilize wait time after system is released

from reset is generated by the on-chip oscillator clock. When

considering the oscillation stabilize wait time after system is re-

leased from reset, be careful that the variable frequency of the

on-chip oscillator clock.

External clock

When the external signal clock is used as the source oscillation

(f(XIN)), note that the power down mode (POF and POF2 instruc-

tions) cannot be used.

Difference between Mask ROM version and One Time PROM version

Mask ROM version and One Time PROM version have some dif-

ference of the following characteristics within the limits of an

electrical property by difference of a manufacture process, built-

in ROM, and a layout pattern.

• a characteristic value

• a margin of operation

• the amount of noise-proof

• noise radiation, etc.,

Accordingly, be careful of them when swithcing.

Note on Power Source Voltage

When the power source voltage value of a microcomputer is less

than the value which is indicated as the recommended operating

conditions, the microcomputer does not operate normally and

may perform unstable operation.

In a system where the power source voltage drops slowly when

the power source voltage drops or the power supply is turned off,

reset a microcomputer when the supply voltage is less than the

recommended operating conditions and design a system not to

cause errors to the system by this unstable operation.

VDD

Recommended

operatng condition

min.value

No reset

Program failure may occur.

VRST

–

VDD

Recommended

operatng condition

min.value

VRST

–

→ Normal operation

Reset

Fig. 67 VDD and VRST–

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