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SH7201 Datasheet(PDF) 73 Page - Renesas Technology Corp

Part # SH7201
Description  32-Bit RISC Microcomputer SuperHTM RISC engine Family / SH7200 Series
PDF  1196 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7201 Datasheet(HTML) 73 Page - Renesas Technology Corp

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Section 2 CPU
Rev. 2.00 Sep. 07, 2007 Page 45 of 1164
REJ09B0321-0200
Compatibility
Instruction
Instruction Code
Operation
Execu-
tion
Cycles
T Bit
SH2,
SH2E SH4
SH-2A
MOV.L
Rm,@(R0,Rn)
0000nnnnmmmm0110
Rm
→ (R0 + Rn)
1
Yes
Yes
Yes
MOV.B
@(R0,Rm),Rn
0000nnnnmmmm1100
(R0 + Rm)
→
sign extension
→ Rn
1
Yes
Yes
Yes
MOV.W
@(R0,Rm),Rn
0000nnnnmmmm1101
(R0 + Rm)
→
sign extension
→ Rn
1
Yes
Yes
Yes
MOV.L
@(R0,Rm),Rn
0000nnnnmmmm1110
(R0 + Rm)
→ Rn
1
Yes
Yes
Yes
MOV.B
R0,@(disp,GBR)
11000000dddddddd
R0
→ (disp + GBR)
1
Yes
Yes
Yes
MOV.W
R0,@(disp,GBR)
11000001dddddddd
R0
→ (disp × 2 + GBR)
1
Yes
Yes
Yes
MOV.L
R0,@(disp,GBR)
11000010dddddddd
R0
→ (disp × 4 + GBR)
1
Yes
Yes
Yes
MOV.B
@(disp,GBR),R0
11000100dddddddd
(disp + GBR)
→
sign extension
→ R0
1
Yes
Yes
Yes
MOV.W
@(disp,GBR),R0
11000101dddddddd
(disp
× 2 + GBR) →
sign extension
→ R0
1
Yes
Yes
Yes
MOV.L
@(disp,GBR),R0
11000110dddddddd
(disp
× 4 + GBR) → R0
1
Yes
Yes
Yes
MOV.B
R0,@Rn+
0100nnnn10001011
R0
→ (Rn), Rn + 1 → Rn
1
Yes
MOV.W
R0,@Rn+
0100nnnn10011011
R0
→ (Rn), Rn + 2 → Rn
1
Yes
MOV.L
R0,@Rn+
0100nnnn10101011
R0
→ Rn), Rn + 4 → Rn
1
Yes
MOV.B
@-Rm,R0
0100mmmm11001011
Rm-1
→ Rm, (Rm) →
sign extension
→ R0
1
Yes
MOV.W
@-Rm,R0
0100mmmm11011011
Rm-2
→ Rm, (Rm) →
sign extension
→ R0
1
Yes
MOV.L
@-Rm,R0
0100mmmm11101011
Rm-4
→ Rm, (Rm) → R0
1
Yes
MOV.B
Rm,@(disp12,Rn) 0011nnnnmmmm0001
0000dddddddddddd
Rm
→ (disp + Rn)
1
Yes
MOV.W
Rm,@(disp12,Rn) 0011nnnnmmmm0001
0001dddddddddddd
Rm
→ (disp × 2 + Rn)
1
Yes
MOV.L
Rm,@(disp12,Rn) 0011nnnnmmmm0001
0010dddddddddddd
Rm
→ (disp × 4 + Rn)
1
Yes
MOV.B
@(disp12,Rm),Rn 0011nnnnmmmm0001
0100dddddddddddd
(disp + Rm)
→
sign extension
→ Rn
1
Yes
MOV.W
@(disp12,Rm),Rn 0011nnnnmmmm0001
0101dddddddddddd
(disp
× 2 + Rm) →
sign extension
→ Rn
1
Yes
MOV.L
@(disp12,Rm),Rn 0011nnnnmmmm0001
0110dddddddddddd
(disp
× 4 + Rm) → Rn
1
Yes



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