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SH7201 Datasheet(PDF) 9 Page - Renesas Technology Corp |
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SH7201 Datasheet(HTML) 9 Page - Renesas Technology Corp |
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9 / 1196 page ![]() Rev. 2.00 Sep. 07, 2007 Page ix of xxviii Contents Section 1 Overview................................................................................................1 1.1 SH7201 Group Features......................................................................................................... 1 1.2 Product Lineup....................................................................................................................... 8 1.3 Block Diagram ....................................................................................................................... 9 1.4 Pin Assignments................................................................................................................... 10 1.5 Pin Functions ....................................................................................................................... 11 Section 2 CPU......................................................................................................19 2.1 Register Configuration......................................................................................................... 19 2.1.1 General Registers.................................................................................................... 19 2.1.2 Control Registers .................................................................................................... 20 2.1.3 System Registers..................................................................................................... 22 2.1.4 Register Banks ........................................................................................................ 23 2.1.5 Initial Values of Registers....................................................................................... 23 2.2 Data Formats........................................................................................................................ 24 2.2.1 Data Format in Registers ........................................................................................ 24 2.2.2 Data Formats in Memory ........................................................................................ 24 2.2.3 Immediate Data Format .......................................................................................... 25 2.3 Instruction Features.............................................................................................................. 26 2.3.1 RISC-Type Instruction Set...................................................................................... 26 2.3.2 Addressing Modes .................................................................................................. 30 2.3.3 Instruction Format................................................................................................... 34 2.4 Instruction Set ...................................................................................................................... 38 2.4.1 Instruction Set by Classification ............................................................................. 38 2.4.2 Data Transfer Instructions....................................................................................... 44 2.4.3 Arithmetic Operation Instructions .......................................................................... 48 2.4.4 Logic Operation Instructions .................................................................................. 51 2.4.5 Shift Instructions..................................................................................................... 52 2.4.6 Branch Instructions ................................................................................................. 53 2.4.7 System Control Instructions.................................................................................... 54 2.4.8 Floating Point Operation Instructions ..................................................................... 56 2.4.9 FPU-Related CPU Instructions ............................................................................... 58 2.4.10 Bit Manipulation Instructions ................................................................................. 59 2.5 Processing States.................................................................................................................. 60 |
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