SH7201 datasheet(145/1196 Pages) RENESAS

145 / 1196 page

Section 6 Interrupt Controller (INTC)

Rev. 2.00 Sep. 07, 2007 Page 117 of 1164

REJ09B0321-0200

6.2

Input/Output Pins

Table 6.1 shows the pin configuration of the INTC.

Table 6.1

Pin Configuration

Pin Name

Symbol

I/O

Function

Nonmaskable interrupt input

NMI

Input

Input of nonmaskable interrupt

request signal

IRQ7 to IRQ0

Input

Interrupt request input pins

PINT7 to PINT0

Input

Input of maskable interrupt request

signals

6.3

The INTC has the following registers. These registers are used to set the interrupt priorities and

control detection of the external interrupt input signal.

Table 6.2

Abbreviation R/W

Initial

Value

Address

Access

Size

Interrupt control register 0

ICR0

R/W

H'FFFD9400

16, 32

Interrupt control register 1

ICR1

R/W

H'0000

H'FFFD9402

Interrupt control register 2

ICR2

R/W

H'0000

H'FFFD9404

16, 32

IRQ interrupt request register

IRQRR

R/(W)*

H'0000

H'FFFD9406

PINT interrupt enable register

PINTER

R/W

H'0000

H'FFFD9408

16, 32

PINT interrupt request register

PIRR

H'0000

H'FFFD940A

Bank control register

IBCR

R/W

H'0000

H'FFFD940C

16, 32

Bank number register

IBNR

R/W

H'0000

H'FFFD940E

Interrupt priority register 01

IPR01

R/W

H'0000

H'FFFD9418

16, 32

Interrupt priority register 02

IPR02

R/W

H'0000

H'FFFD941A

Interrupt priority register 05

IPR05

R/W

H'0000

H'FFFD9420

Interrupt priority register 06

IPR06

R/W

H'0000

H'FFFD9800

16, 32

Interrupt priority register 07

IPR07

R/W

H'0000

H'FFFD9802

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