| Electronic Components Datasheet Search |
|
HD64F36022 Datasheet(PDF) 193 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F36022 Datasheet(HTML) 193 Page - Renesas Technology Corp |
|
193 / 384 page ![]() Section 12 Watchdog Timer WDT0110A_000020020200 Rev. 4.00 Sep. 23, 2005 Page 167 of 354 REJ09B0025-0400 Section 12 Watchdog Timer The watchdog timer is an 8-bit timer that can generate an internal reset signal for this LSI if a system crash prevents the CPU from writing to the timer counter, thus allowing it to overflow. The block diagram of the watchdog timer is shown in figure 12.1. ø Internal reset signal PSS TCWD TMWD TCSRWD Legend: TCSRWD: Timer control/status register WD TCWD: Timer counter WD PSS: Prescaler S TMWD: Timer mode register WD Internal oscillator CLK Figure 12.1 Block Diagram of Watchdog Timer 12.1 Features • Selectable from nine counter input clocks. Eight clock sources ( φ/64, φ/128, φ/256, φ/512, φ/1024, φ/2048, φ/4096, and φ/8192) or the internal oscillator can be selected as the timer-counter clock. When the internal oscillator is selected, it can operate as the watchdog timer in any operating mode. • Reset signal generated on counter overflow An overflow period of 1 to 256 times the selected clock can be set. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |