| Electronic Components Datasheet Search |
|
HD64F36022 Datasheet(PDF) 236 Page - Renesas Technology Corp |
|
|
|||||||||||||||||||||||||||||
HD64F36022 Datasheet(HTML) 236 Page - Renesas Technology Corp |
|
236 / 384 page ![]() Section 13 Serial Communication Interface 3 (SCI3) Rev. 4.00 Sep. 23, 2005 Page 210 of 354 REJ09B0025-0400 13.6.2 Multiprocessor Serial Data Reception Figure 13.17 shows a sample flowchart for multiprocessor serial data reception. If the MPIE bit in SCR3 is set to 1, data is skipped until data with a 1 multiprocessor bit is sent. On receiving data with a 1 multiprocessor bit, the receive data is transferred to RDR. An RXI interrupt request is generated at this time. All other SCI3 operations are the same as those in asynchronous mode. Figure 13.18 shows an example of SCI3 operation for multiprocessor format reception. |
|
Link URL |
| Does ALLDATASHEET help your business so far? [ DONATE ] |
About Alldatasheet | Advertisement | Contact us | Privacy Policy | Link to Datasheet | Link Exchange | Manufacturer List All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |