SH7101 datasheet(381/560 Pages) RENESAS

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Section 11 A/D Converter

Rev.1.00 Sep. 18, 2008 Page 347 of 522

REJ09B0069-0100

11.7

Usage Notes

11.7.1

Module Standby Mode Setting

Operation of the A/D converter can be disabled or enabled using the module standby control

enabled by clearing module standby mode. For details, refer to section 18, Power-Down Modes.

11.7.2

Permissible Signal Source Impedance

This LSI's analog input is designed such that conversion accuracy is guaranteed for an input signal

for which the signal source impedance is 1 k

Ω or less than 3 kΩ. (For details, see table 11.6.) This

specification is provided to enable the A/D converter's sample-and-hold circuit input capacitance

to be charged within the sampling time; if the sensor output impedance is 1 k

Ω or exceeds 3 kΩ,

charging may be insufficient and it may not be possible to guarantee A/D conversion accuracy.

However, for A/D conversion in single mode with a large capacitance provided externally, the

input load will essentially comprise only the internal input resistance of 10 k

Ω, and the signal

source impedance is ignored. However, as a low-pass filter effect is obtained in this case, it may

not be possible to follow an analog signal with a large differential coefficient (e.g., 5 mV/

μs or

greater) (see figure 11.7). When converting a high-speed analog signal or converting in scan

mode, a low-impedance buffer should be inserted.

11.7.3

Influences on Absolute Accuracy

Adding capacitance results in coupling with GND, and therefore noise in GND may adversely

affect absolute accuracy. Be sure to make the connection to an electrically stable GND such as

AVss.

Care is also required to insure that filter circuits do not communicate with digital signals on the

mounting board (i.e, acting as antennas).

20 pF

10 k

Cin =

15 pF

Sensor output

impedance of

up to 3 k

Ω or to 3 kΩ

This LSI

Low-pass

filter

C to 0.1

μF

Sensor input

A/D converter

equivalent circuit

Figure 11.7 Example of Analog Input Circuit

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