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SH7101 Datasheet(PDF) 377 Page - Renesas Technology Corp |
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SH7101 Datasheet(HTML) 377 Page - Renesas Technology Corp |
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377 / 560 page ![]() Section 11 A/D Converter Rev.1.00 Sep. 18, 2008 Page 343 of 522 REJ09B0069-0100 Table 11.3 A/D Conversion Time (Single Mode) CKS1 = 0 CKS1 = 1 CKS0 = 0 CKS0 = 1 CKS0 = 0 CKS0 = 1 Item Symbol Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. Min. Typ. Max. A/D conversion start delay time t D 31 — 62 15 — 30 7 — 14 3 — 6 Input sampling time t SPL — 256 — — 128 — — 64 — — 32 — A/D conversion time t CONV 1024 — 1055 515 — 530 259 — 266 131 — 134 Note: All values represent the number of states for P φ. Table 11.4 A/D Conversion Time (Scan Mode) CKS1 CKS0 Conversion Time (State) 0 1024 (Fixed) 0 1 512 (Fixed) 1 0 256 (Fixed) 1 128 (Fixed) 11.4.5 A/D Converter Activation by MTU or MMT The A/D converter can be independently activated by an A/D conversion request from the interval timer of the MTU or MMT. To activate the A/D converter by the MTU or MMT, set the A/D trigger select register (ADTSR). After this register setting has been made, the ADST bit in ADCR is automatically set to 1 when an A/D conversion request from the interval timer of the MTU or MMT occurs. The timing from setting of the ADST bit until the start of A/D conversion is the same as when 1 is written to the ADST bit by software. 11.4.6 External Trigger Input Timing A/D conversion can be externally triggered. When the TRGS0 and TRGS1 bits are set to 00 or 01 in ADTSR, external trigger input is enabled at the ADTRG pin. A falling edge of the ADTRG pin sets the ADST bit to 1 in ADCR, starting A/D conversion. Other operations, in both single and scan modes, are the same as when the ADST bit has been set to 1 by software. Figure 11.4 shows the timing. |
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