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SH7101 Datasheet(PDF) 142 Page - Renesas Technology Corp

Part # SH7101
Description  32-Bit RISC Microcomputer
PDF  560 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

SH7101 Datasheet(HTML) 142 Page - Renesas Technology Corp

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Section 7 Bus State Controller (BSC)
Rev.1.00 Sep. 18, 2008 Page 108 of 522
REJ09B0069-0100
When the wait is specified by software using WCR1, the wait input
WAIT signal from outside is
sampled. Figure 7.5 shows the
WAIT signal sampling. The WAIT signal is sampled at the clock
rise one cycle before the clock rise when the TW state shifts to the T2 state. When using external
waits, use a WCR1 setting of 1 state or more in case of extending
CS assertion, and 2 states or
more otherwise.
Write
Data
Data
Address
CK
Read
T1
TW
TW
TWo
T2
Figure 7.5 Wait State Timing of External Space Access
(Two Software Wait States
+ WAIT Signal Wait State)



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